Applied Materials, Inc.

Yongmei Chen

Ludovic Godet

Huixiong Dai

Jun Xue

Jingjing Liu

Chentsau Chris Ying

Christopher S Ngai

Srinivas D Nemani

Mehul B Naik

Christopher Dennis Bencher

He Ren

Bencherki Mebarki

Abhijit Basu Mallick

Li-Qun Xia

Ellie Y Yieh

Michael Wayne Stowell, Jr

Anantha K Subramani

Pramit Manna

Mihaela A Balseanu

Rami Hourani

Mingwei Zhu

Yue Chen

Mukund Srinivasan

Hao Chen

Hui W Chen

Derek R Witty

Jinxin Fu

Wenhui Wang

Keith Tatseun Wong

Raymond Hoiman Hung

David Masayuki Ishikawa

Shambhu Nath Roy

Liqi Wu

Takashi Kuratomi

Zihao Yang

Victor Nguyen

Michael Duane

Jen Shu

Wenyu Zhang

Li Yan Miao

Chorng-Ping Chang

Isabelita Roflox

Ke Chang

Christopher Siu Wing Ngai

Susie Xiuru Yang

Jingyi Yang

Xumou Xu

Kenneth MacWilliams

Jinyu Lu

Jiahua Yu

Qun Jing

A method of processing an optical device is provided, including: positioning an optical device on a substrate support in an interior volume of a process chamber, the optical device including an optical device substrate and a plurality of optical device structures formed over the optical device substrate, each optical device structure including a bulk region formed of silicon carbide and one or more surface regions formed of silicon oxycarbide. The method further includes providing one or more process gases to the interior volume of the process chamber, and generating a plasma of the one or more process gases in the interior volume for a first time period when the optical device is on the substrate support, and stopping the plasma after the first time period. A carbon content of the one or more surface regions of each optical device structure is reduced by at least 50% by the plasma.

Optical device improvement

Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

Method for forming a layer

Embodiments of the present disclosure provide a sputtering chamber with in-situ ion implantation capability. In one embodiment, the sputtering chamber comprises a target, an RF and a DC power supplies coupled to the target, a support body comprising a flat substrate receiving surface, a bias power source coupled to the support body, a pulse controller coupled to the bias power source, wherein the pulse controller applies a pulse control signal to the bias power source such that the bias power is delivered either in a regular pulsed mode having a pulse duration of about 100-200 microseconds and a pulse repetition frequency of about 1-200 Hz, or a high frequency pulsed mode having a pulse duration of about 100-300 microseconds and a pulse repetition frequency of about 200 Hz to about 20 KHz, and an exhaust assembly having a concentric pumping port formed through a bottom of the processing chamber.

Extension of PVD chamber with multiple reaction gases, high bias power, and high power impulse source for deposition, implantation, and treatment

A method of forming an interconnect structure for semiconductor or MEMS structures at a 10 nm Node (16 nm HPCD) down to 5 nm Node (7 nm HPCD), or lower, where the conductive contacts of the interconnect structure are fabricated using solely subtractive techniques applied to conformal layers of conductive materials.

Self-aligned interconnects formed using subtractive techniques

A nanocrystalline diamond layer for use in forming a semiconductor device and methods for using the same are disclosed herein. The device can include a substrate with a processing surface and a supporting surface, a device layer formed on the processing surface and a nanocrystalline diamond layer formed on the processing layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm. The method can include positioning a substrate in a process chamber, depositing a device layer on a processing surface, depositing a nanocrystalline diamond layer on the device layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm, patterning and etching the nanocrystalline diamond layer, etching the device layer to form a feature and ashing the nanocrystalline diamond layer from the surface of the device layer.

Nanocrystalline diamond carbon film for 3D NAND hardmask application

Self-aligned interconnects formed using substractive techniques

Methods for depositing a nanocrystalline diamond layer are disclosed herein. The method can include delivering a sputter gas to a substrate positioned in a processing region of a first process chamber, the first process chamber having a carbon-containing sputter target, delivering an energy pulse to the sputter gas to create a sputtering plasma, the sputtering plasma having a sputtering duration, the energy pulse having an average power between 1 W/cmand 10 W/cmand a pulse width which is less than 100 &#x3bc;s and greater than 30 &#x3bc;s, the sputtering plasma being controlled by a magnetic field, the magnetic field being less than 300. Gauss, and delivering the sputtering plasma to the sputter target to form an ionized species, the ionized species forming a crystalline carbon-containing layer on the substrate.

High power impulse magnetron sputtering process to achieve a high density high SP3 containing layer

Embodiments described herein provide for a method of forming an etch selective hardmask. An amorphous carbon hardmask is implanted with various dopants to increase the hardness and density of the hardmask. The ion implantation of the amorphous carbon hardmask also maintains or reduces the internal stress of the hardmask. The etch selective hardmask generally provides for improved patterning in advanced NAND and DRAM devices.

Development of high etch selective hardmask material by ion implantation into amorphous carbon films

Methods for making a nanocrystalline diamond layer are disclosed herein. A method of forming a layer can include activating a deposition gas comprising an alkane and a hydrogen containing gas at a first pressure, delivering the activated deposition gas to the substrate at a second pressure which is less than the first pressure, forming a nanocrystalline diamond layer, treating the layer with an activated hydrogen containing gas to remove one or more polymers from the surface and repeating the cycle to achieve a desired thickness.

Remote plasma source based cyclic CVD process for nanocrystalline diamond deposition

Methods to pattern features in a substrate layer by exposing a photoresist layer more than once. In one embodiment, a single reticle may be exposed more than once with an overlay offset implemented between successive exposures to reduce the half pitch of the reticle. In particular embodiments, these methods may be employed to reduce the half pitch of the features printed with 65 nm generation lithography equipment to achieve 45 nm lithography generation CD and pitch performance.

Double exposure patterning with carbonaceous hardmask

A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate surface, and etching the spacer layer to expose the substrate structure and a portion of the substrate surface, wherein the spacer layer is disposed adjacent the substrate structure. The spacer layer may comprise a boron nitride material. The spacer layer may comprise a base spacer layer and a liner layer, and the spacer layer may be etched in a two-step etching process.

Boron nitride and boron-nitride derived materials deposition method

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San Jose, CA, United States of America

Yongmei Chen