Shanghai Huali Integrated Circuit Corporation

Shanghai Huali Integrated Circuit Mfg. Co., Ltd.

Yongji Mao

Yu Zhang

Liyao Liu

Zhanyuan Hu

Ronghong Ye

Provided is a method for manufacturing a 14 nm-node BEOL 32 nm-width metal. A semiconductor structure for manufacturing BEOL wire is provided, wherein the semiconductor structure at least comprises a carbon coating and intermediate layer on it; forming a photoresist layer on the intermediate layer and exposing the photoresist layer according to a layout; developing the exposed photoresist layer by using a developing solution, and causing the developed photoresist to react with the intermediate layer in a contact region of the developed photoresist to form a peg groove; and etching by using the groove in the semiconductor structure to form a 14 nm-node BEOL 32 nm-width metal. This application can reducing the longitudinal shrink of the metal wire, achieving the improvement of the lateral and longitudinal shrink uniformity, reducing defects caused by misalignment of the through hole and the metal wire, and increasing the effective usable area of a chip.

Method for manufacturing a 14nm-node BEOL 32nm-width metal

The present disclosure relates to a FinFET and a manufacturing method of a contact. The manufacturing method comprises steps of: sequentially generating an interlayer dielectric layer, a metal hard mask, an oxide protective cap and a tri-layer mask on a gate to form a device to be etched; photoetching the tri-layer mask to remove photoresist in a non-patterned area; performing main etch on the device to be etched after the photoetching to remove the interlayer dielectric layer in the area that is not covered by the metal hard mask, and the metal hard mask is provided with the oxide protective cap; performing ODL removal on the device to be etched after the main etch to remove remaining part of the tri-layer mask; performing oxide etch on the device to be etched after the ODL removal to remove the oxide protective cap; and generating the contact on the device after the oxide etch. The present disclosure can accurately control the critical dimensions of the contact in an X direction and a Y direction.

FinFET and a manufacturing method of a contact thereof

A method of making MIM capacitors includes: forming well regions in a semiconductor substrate, forming a gate dielectric layer on the semiconductor substrate, forming a polysilicon gate structure on a surface of the well region, forming a dummy gate on the gate dielectric layer and removing the dummy gate to expose the gate dielectric layer, and forming a metal gate structure on the exposed gate dielectric layer, wherein the metal gate structure comprises an electrode barrier layer on the gate dielectric layer and a metal gate on the gate dielectric layer. A lower electrode plate of the MIM capacitor is formed in the process of forming the metal gate structure, forming a capacitor dielectric layer above the lower electrode plate, and forming an upper electrode plate on the capacitor dielectric layer. Manufacturing of the MIM capacitor can be integrated in the process of manufacturing the semiconductor integrated circuit.

Growing community of inventors

Shanghai, China

Yongji Mao