Nepes Co., Ltd.

Yong Woon Yeo

Jun Kyu Lee

Eung Ju Lee

Chang Woo Lee

Yong Tae Kwon

Dong Hoon Oh

Yun Mook Park

Su Yun Kim

Jong Heon Kim

Kyeong Rok Shin

Hyo Young Kim

Yongtae Kwon

Nam Chul Kim

Seok Hwi Cheon

A semiconductor package includes an upper structure including a semiconductor chip and a first molding layer for molding the semiconductor chip, a lower structure provided on the upper structure, the lower structure including a conductive post and a second molding layer for molding the conductive post, and a redistribution structure provided between the upper structure and the lower structure, the redistribution structure including a wiring pattern for electrically connecting a pad of the semiconductor chip to the conductive post, in which a thermal expansion coefficient of the second molding layer is different from a thermal expansion coefficient of the first molding layer.

Semiconductor package comprising first molding layer and second molding layer with different thermal expansion coefficients

A semiconductor package according to an exemplary embodiment of the present disclosure may comprise a semiconductor chip comprising a chip pad; a redistribution layer electrically connected to the chip pad of the semiconductor chip; an external connection terminal electrically connected to the redistribution layer; a sealing material covering the semiconductor chip and configured to fix the semiconductor chip and the redistribution layer; an adhesive film positioned on the upper surface of the sealing material; and a heat sink formed on the upper surface of the adhesive film and having a stepped portion at the periphery thereof.

Semiconductor package

Disclosed are a chip package capable of improving the strength of a package and simplifying a manufacturing process and a manufacturing method therefor. This invention may improve the durability of the package by further forming a reinforcing layer on a chip by using an adhesive layer and molding the chip and the reinforcing layer so as to be integrated by using a molding layer. Also, the strength of the package may be improved by having a structure in which solder balls are formed between a base substrate and a re-wiring layer and integrated with the molding layer, and a wiring layer may be formed directly on the molding layer by using polyimide (PI) as the molding layer without using a separate insulating layer formed on the molding layer as in the conventional art.

Chip package with connection portion that passes through an encapsulation portion

Growing community of inventors

Cheongju, South Korea

Yong Woon Yeo