Kla Tencor Corporation

Kla Corporation

Yoel Feler

Vladimir Levinski

Mark Ghinovker

Daniel Kandel

Evgeni Gurevich

Nadav Gutman

Barak Bringoltz

Amnon Manassen

Alexander Svizher

Roie Volkovich

Noam Sapiens

Nuriel Amir

Meir Aloni

Stefan Eyring

Raviv Yohanan

Roel Gronheid

Eitan Hajaj

Ulrich Pohlmann

Inna Steely-Tarshish

Guy Ben Dov

Sharon Aharon

Ohad Bachar

Liran Yerushalmi

Anna Golotsvan

Inna Tarshish-Shapir

Diana Shaphirov

Michael E Adel

Andrew V Hill

Stilian Pandev

Daria Negri

Joel L Seligson

Boris Golovanevsky

Tal Marciano

Dana Klein

Hiroyuki Kurita

Gilad Laredo

Dzmitry Sanko

Ira Naot

Hadar Shalmoni

David Izraeli

Boris Efraty

Tal Yaziv

Lilach Saltoun

Moran Zaberchik

Renan Milo

Noga Sella

Ido Adam

Tom Leviant

Paykin Irina

Oded Kaminsky

Chris Steely

Yuval Lamhot

Dror Alumot

Anat Marchelli

Nadav Carmel

Ofer Zaharan

Sigalit Robinzon

Amir Handelman

Eliav Benisty

Eltsafon Ashwal-Island

Yaron De Leeuw

Irina Paykin

Dzimtry Sanko

Mohamed El Kodadi

Berta Dinu

Detlef Michelsson

Ze'ev Lindenfeld

Eltsafon Ashwal

Zeng Zhao

Roee Sulimarski

Moshe Cooper

Yaron Deleeuw

Mohammed El Kodadi

A metrology system may receive a plurality of candidate design variations of a target layout of an overlay target. A metrology system may determine one or more process-induced target defects for the plurality of candidate design variations when fabricated with a known fabrication process. A metrology system may determine one or more process-induced overlay errors associated with the one or more process-induced target defects for the plurality of candidate design variations when measured with a known metrology recipe. A metrology system may select a final design variation from the plurality of candidate design variations that provides a smallest aggregate overlay error based on the one or more process-induced overlay errors.

Robust and accurate overlay target design for CMP

A method for measurement of misregistration in the manufacture of semiconductor device wafers, the method including measuring misregistration between layers of a semiconductor device wafer at a first instance and providing a first misregistration indication, measuring misregistration between layers of a semiconductor device wafer at a second instance and providing a second misregistration indication, providing a misregistration measurement difference output in response to a difference between the first misregistration indication and the second misregistration indication, providing a baseline difference output and ameliorating the difference between the misregistration measurement difference output and the baseline difference output.

Method for measuring and correcting misregistration between layers in a semiconductor device, and misregistration targets useful therein

A multi-layered moir target, useful in the calculation of misregistration between at least first, second and third layers being formed on a semiconductor device wafer, including at least one group of periodic structure stacks, each including a first stack, including a first stack first periodic structure (S1P1) having an S1P1 pitch along a first axis, a second stack, including a second stack first periodic structure (S2P1) having an S2P1 pitch along a second axis and a third stack, including a third stack first periodic structure (S3P1) having an S3P1 pitch along a third axis, the first axis being parallel to an x-axis or a y-axis, and at least one of the stacks including a second periodic structure having a second periodic structure pitch along at least one fourth axis parallel to the first axis and co-axial with one of the axes.

Multi-layered moiré targets and methods for using the same in measuring misregistration of semiconductor devices

A metrology target may include a first rotationally symmetric working zone with one or more instances of a first pattern and a second rotationally-symmetric working zone with one or more instances of a second pattern, where at least one of the first pattern or the second pattern is a Moiré pattern formed from a first grating structure with a first pitch along a measurement direction on a first sample layer and a second grating structure with a second pitch different than the first pitch along the measurement direction on a second sample layer. Centers of rotational symmetry of the first and second working zones may overlap by design when an overlay error between the first sample layer and the second layer is zero. A difference between the centers of rotational symmetry of the first and second working zones may indicate an overlay error between the first and second sample layers.

Imaging overlay targets using moiré elements and rotational symmetry arrangements

A method of semiconductor metrology includes patterning a film layer on a semiconductor substrate to define a first field on the semiconductor substrate with a first pattern comprising at least a first target feature within a first margin along a first edge of the first field and to define a second field, which abuts the first field, with a second pattern comprising at least a second target feature within a second margin along a second edge of the second field, such that the second edge of the second field adjoins the first edge of the first field. The first target feature in the first margin is adjacent to the second target feature in the second margin without overlapping the second target feature. An image is captured of at least the first and second target features and is processed to detect a misalignment between the first and second fields.

Measurement of stitching error using split targets

Electron beam overlay targets and method of performing overlay measurements on a target using a semiconductor metrology tool are provided. One target includes a plurality of electron beam overlay elements and a plurality of two-dimensional elements that provide at least one two-dimensional imaging. The plurality of two dimensional elements are an array of evenly-spaced polygonal gratings across at least three rows and at least three columns. Another target includes a plurality of electron beam overlay elements and a plurality of AIMid elements. Each of the electron beam overlay elements includes at least two gratings that are overlaid at a perpendicular orientation to each other. The plurality of AIMid elements includes at least two gratings that are overlaid at a perpendicular orientation to each other.

Overlay mark design for electron beam overlay

Metrology methods and targets are provided for reducing or eliminating a difference between a device pattern position and a target pattern position while maintaining target printability, process compatibility and optical contrast—in both imaging and scatterometry metrology. Pattern placement discrepancies may be reduced by using sub-resolved assist features in the mask design which have a same periodicity (fine pitch) as the periodic structure and/or by calibrating the measurement results using PPE (pattern placement error) correction factors derived by applying learning procedures to specific calibration terms, in measurements and/or simulations. Metrology targets are disclosed with multiple periodic structures at the same layer (in addition to regular target structures), e.g., in one or two layers, which are used to calibrate and remove PPE, especially when related to asymmetric effects such as scanner aberrations, off-axis illumination and other error sources.

Reduction or elimination of pattern placement error in metrology measurements

Methods, metrology modules and target designs are provided, which improve the accuracy of metrology measurements. Methods provide flexible handling of multiple measurement recipes and setups and enable relating them to landscape features that indicate their relation to resonance regions and to flat regions. Clustering of recipes, self-consistency tests, common processing of aggregated measurements, noise reduction, cluster analysis, detailed analysis of the landscape and targets with skewed cells are employed separately or in combination to provide cumulative improvements of measurement accuracy.

Accuracy improvements in optical metrology

The present disclosure provides a target and a method of performing overlay measurements on a target. The target includes an array of cells comprising a first cell, a second cell, a third cell, and a fourth cell. Each cell includes a periodic structure with a pitch. The periodic structure includes a first section and a second section, separated by a first gap. The target further includes an electron beam overlay target, such that electron beam overlay measurements, advanced imaging metrology, and/or scatterometry measurements can be performed on the target.

A method for semiconductor metrology includes depositing a first film layer on a semiconductor substrate and a second film layer overlying the first film layer. The first and second film layers are patterned to define a plurality of overlay targets comprising first target features formed in the first film layer having respective first locations, which are spaced apart by first nominal distances, and second target features formed in the second film layer having respective second locations, which are spaced apart by second nominal distances, which are different from the first nominal distances. An image of the semiconductor substrate is processed to measure respective displacements between the first and second target locations in each of the overlay targets, and to estimate both an actual overlay error between the patterning of the first and second film layers and a measurement error of the imaging assembly.

Induced displacements for improved overlay error metrology

Combined electron beam overlay and scatterometry overlay targets include first and second periodic structures with gratings. Gratings in the second periodic structure can be positioned under the gratings of the first periodic structure or can be positioned between the gratings of the first periodic structure. These overlay targets can be used in semiconductor manufacturing.

Overlay design for electron beam and scatterometry overlay measurements

A metrology target includes a first target structure set having one or more first target structures formed within at least one of a first working zone or a second working zone of a sample. The metrology target includes a second target structure set having one or more second target structures formed within at least one of the first working zone or the second working zone. The first working zone may include a center of symmetry that overlaps with a center of symmetry of the second working zone when an overlay error of one or more layers of the sample is not present. The metrology target may additionally include a third target structure set, a fourth target structure set, or a fifth target structure set.

Metrology target for one-dimensional measurement of periodic misregistration

A grating for use in metrology including a periodic structure including a plurality of units having a pitch P, at least one unit of the plurality of units including at least a first periodic sub-structure having a first sub-pitch P1 smaller than the pitch P, and at least a second periodic sub-structure arranged along-side and separated from the first periodic sub-structure within the at least one unit and having a second sub-pitch P2 smaller than the pitch P and different from the first sub-pitch P1, P1 and P2 being selected to yield at least one Moir pitch P=P1&#xb7;P2/(P2&#x2212;P1), the pitch P being an integer multiple of the first sub-pitch P and of the second sub-pitch P2.

Self-Moire grating design for use in metrology

A metrology system configured to measure overlay errors on a sample is disclosed. The metrology system measures overlay error on the sample in a first direction and/or a second direction simultaneously or sequentially. The metrology system comprises an illumination sub-system configured to illuminate a hatched overlay target on the sample with one or more illumination lobes. The metrology system further comprises an objective lens and a detector at an image plane configured to image the hatched overlay target. A controller is configured to direct illumination source to generate the illumination lobes, receive images of the hatched overlay target, and calculate the overlay errors between a first layer of the sample and a second layer of the sample.

Metrology methods and optical schemes for measurement of misregistration by using hatched target designs

Metrology methods and targets are provided for reducing or eliminating a difference between a device pattern position and a target pattern position while maintaining target printability, process compatibility and optical contrast&#x2014;in both imaging and scatterometry metrology. Pattern placement discrepancies may be reduced by using sub-resolved assist features in the mask design which have a same periodicity (fine pitch) as the periodic structure and/or by calibrating the measurement results using PPE (pattern placement error) correction factors derived by applying learning procedures to specific calibration terms, in measurements and/or simulations. Metrology targets are disclosed with multiple periodic structures at the same layer (in addition to regular target structures), e.g., in one or two layers, which are used to calibrate and remove PPE, especially when related to asymmetric effects such as scanner aberrations, off-axis illumination and other error sources.

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Haifa, Israel

Yoel Feler