Intel Corporation

Yew Wee Cheong

Weng Khoon Mong

Oi Fong Chin

Mun Leong Loke

Wei Keat Loh

Szu Shing Lim

Sheou Hooi Lim

Eng Chiang Gan

Al Ling Low

Yee Hao Ho

An embodiment of the present invention is a technique to package flip chip molded matrix array package. An ultraviolet (UV) curable tape is laminated on die backside of a strip of array of flip chips. The UV curable tape has an adhesive strength. The strip of flip chip arrays is molded with a mold film. The molded strip of flip chip array is irradiated using UV radiation. In another embodiment, a double functional tape is mounted to backside of a wafer. The double functional tape includes a binding tape and a ultraviolet (UV) curable tape having an adhesive strength. The wafer is singulated into die. The die is attached to a substrate strip to form a strip of array of flip chips. The strip is molded with a mold film. The molded strip is irradiated using UV radiation.

Die molding for flip chip molded matrix array package using UV curable tape

Methods for grinding low-K interlayer dielectric (ILD) wafers are described herein. In various embodiments, the method may include cutting and severing a semiconductor wafer into a plurality of portions, the cutting and severing being performed in a manner that allows the portions to remain disposed with each other as if the semiconductor wafer had not been cut, applying a tape to a front side of the as if uncut semiconductor wafer, and grinding a backside of the taped as if uncut semiconductor wafer. In various other embodiments, the method may include attaching an adhesive to a backside of the semiconductor wafer prior to cutting the semiconductor wafer along the streets of the semiconductor wafer with the scribed lines to cut and sever the semiconductor wafer into a plurality of portions, with the portions remaining proximally disposed to each other and held in place by the adhesive as if the semiconductor device had not been cut.

Wafer grinding method

An apparatus having and method of forming grooves in the surface of a substrate adjacent and parallel to sidewall locations for circuit chips or die mounted on the surface. The grooves have physical dimensions to retain fill material formed between the packages and the surface of the substrate so that the fill material does not bridge between chips, thus reducing warping of the substrate due to mismatches in coefficient of thermal expansion (CTE) between the fill material, the substrate, the chips, and mold material formed over the substrate, under fill, and chips.

Substrate grooves to reduce underfill fillet bridging

An apparatus and a system for separating dice from a substrate are described herein.

Apparatus for controlled fracture substrate singulation

Methods and apparatus for separating dice from a substrate are described herein.

Controlled fracture substrate singulation

A method that includes, obtaining a substrate, placing a reinforcing layer over a first side of the substrate; and thinning the substrate by removing material from an opposite side of the substrate.

Growing community of inventors

Penang, Malaysia

Yew Wee Cheong