Taiwan Semiconductor Manufacturing Comp. Ltd.

Yen-Kun Lai

Kuo-Chin Chang

Mirng-Ji Lii

Wei-Hsiang Tu

Kuo-Ching Hsu

Hao-Chun Liu

Chien-Hao Hsu

Mirng-ji Lii

Chien Hao Hsu

A semiconductor die includes semiconductor devices located on a semiconductor substrate, metal-insulator-metal corner structures overlying the semiconductor devices and located in corner regions of the semiconductor die. Metal-insulator-metal corner structures are located in the corner regions of the semiconductor die. Each of the metal-insulator-metal corner structures has a horizontal cross-sectional shape selected from a triangular shape and a polygonal shape including a pair of laterally-extending strips extending along two horizontal directions that are perpendicular to each other and connected to each other by a connecting shape.

MIMcap corner structures in the keep-out zones of a semiconductor die and methods of forming the same

A semiconductor device including a semiconductor die, a first conductive pad, a second conductive pad, a first connector structure and a second connector structure is provided. The first conductive pad is disposed on the semiconductor die, wherein the first conductive pad has a first lateral dimension. The second conductive pad is disposed on the semiconductor die, wherein the second conductive pad has a second lateral dimension. The first connector structure is disposed on the first conductive pad, wherein the first connector structure has a third lateral dimension greater than the first lateral dimension. The second connector structure is disposed on the second conductive pad, wherein the second connector structure has a fourth lateral dimension smaller than the second lateral dimension.

Semiconductor device

A semiconductor die includes a semiconductor substrate, an interconnect structure, and a conductive bump. The interconnect structure is disposed on and electrically connected to the semiconductor substrate. The interconnect structure includes stacked interconnect layers. Each of the stacked interconnect layers includes a dielectric layer and an interconnect wiring embedded in the dielectric layer. The interconnect wiring of a first interconnect layer among the stacked interconnect layers further includes a first via and second vias. The first via electrically connected to the interconnect wiring. The second vias connected to the interconnect wiring, and the first via and the second vias are located on a same level height. The conductive bump is disposed on the interconnect structure. The conductive bump includes a base portion and a protruding portion connected to the base portion, and the base portion is between the protruding portion and the first via.

Semiconductor die

A method of forming a semiconductor structure is provided. A layout of a substrate is provided. The layout includes a surface having an inner region and an outer region surrounding the inner region. An under bump metallurgy (UBM) pad region within the outer region is defined. The UBM pad region is partitioned into a first zone and a second zone, wherein the first zone faces towards a center of the substrate, and the second zone faces away from the center of the substrate. The substrate is provided according to the layout, wherein the providing of the substrate includes forming a conductive via in the substrate. The conductive via is disposed outside the second zone and at least partially overlaps the first zone from a top view perspective. A UBM pad is formed over the conductive via and within the UBM pad region.

Semiconductor structure and manufacturing method thereof

A semiconductor structure includes a substrate having a surface and a conductive via in the substrate. The surface has an inner region and an outer region surrounding the inner region. The semiconductor structure also includes an under bump metallurgy (UBM) pad on the surface and within the outer region, where the UBM pad has a first zone and a second zone. The first zone faces towards a center of the surface and the second zone faces away from the center of the surface. The conductive via is disposed outside the second zone and at least partially overlaps the first zone from a top view perspective.

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Taipei, Taiwan

Yen-Kun Lai