Taiwan Semiconductor Manufacturing Comp. Ltd.

Yen-Cheng Lu

Anthony Yen

Shinn-Sheng Yu

Jeng-Horng Chen

Chih-Tsung Shih

Shun-Der Wu

Chia-Hao Hsu

Chia-Chen Chen

Hsin-Chang Lee

Shu-Hao Chang

Chung-Ju Lee

Chia-Jen Chen

Tsung-Min Huang

Tsiao-Chen Wu

Jui-Ching Wu

Tzu-Hsiang Chen

Ming-Jiun Yao

Chia-Tsung Shih

Pei-Chung Hsu

Various methods are disclosed herein for reducing (or eliminating) printability of mask defects during lithography processes. An exemplary method includes performing a first lithography exposing process and a second lithography exposing process using a mask to respectively image a first set of polygons oriented substantially along a first direction and a second set of polygons oriented substantially along a second direction on a target. During the first lithography exposing process, a phase distribution of light diffracted from the mask is dynamically modulated to defocus any mask defect oriented at least partially along both the first direction and a third direction that is different than the first direction. During the second lithography exposing process, the phase distribution of light diffracted from the mask is dynamically modulated to defocus any mask defect oriented at least partially along both the second direction and a fourth direction that is different than the third direction.

Method to mitigate defect printability for ID pattern

A lithography system includes a radiation source configured to generate an extreme ultraviolet (EUV) light. The lithography system includes a mask that defines one or more features of an integrated circuit (IC). The lithography system includes an illuminator configured to direct the EUV light onto the mask. The mask diffracts the EUV light into a 0-th order ray and a plurality of higher order rays. The lithography system includes a wafer stage configured to secure a wafer that is to be patterned according to the one or more features defined by the mask. The lithography system includes a pupil phase modulator positioned in a pupil plane that is located between the mask and the wafer stage. The pupil phase modulator is configured to change a phase of the 0-th order ray.

Extreme ultraviolet lithography system, device, and method for printing low pattern density features

Lithography methods and corresponding lithography apparatuses are disclosed herein for improving throughput of lithography exposure processes. An exemplary lithography method includes generating a plurality of target material droplets and generating radiation from the plurality of target material droplets based on a dose margin to expose a wafer. The dose margin indicates how many of the plurality of target material droplets are reserved for dose control. In some implementations, the plurality of target material droplets are grouped into a plurality of bursts, and the lithography method further includes performing an inter-compensation operation that designates an excitation state of target material droplets in one of the plurality of bursts to compensate for an energy characteristic of another one of the plurality of bursts.

EUV lithography system and method with optimized throughput and stability

An extreme ultraviolet lithography (EUVL) system is disclosed. The system includes an extreme ultraviolet (EUV) mask with three states having respective reflection coefficient is r, rand r, wherein ris a pre-specified value that is a function of rand r. The system also includes a nearly on-axis illumination (ONI) with partial coherence &#x3c3; less than 0.3 to expose the EUV mask to produce diffracted light and non-diffracted light. The system further includes a projection optics box (PUB) to remove a portion of the non-diffracted light and to collect and direct the diffracted light and the remaining non-diffracted light to expose a target.

Extreme ultraviolet lithography process and mask

The present disclosure provides a method in accordance with some embodiments. The method includes loading a mask to a lithography system, wherein the mask includes an one-dimensional integrated circuit (1D IC) pattern; utilizing a pupil phase modulator in the lithography system to modulate phase of light diffracted from the mask; and performing a lithography exposing process to a target in the lithography system with the mask and the pupil phase modulator.

An extreme ultraviolet lithography (EUVL) system for patterning a semiconductor wafer includes an extreme ultraviolet (EUV) mask. The EUV mask includes first and second states, and further includes a polygon region and an open-spacing region. The polygon region includes a plurality of main polygons separated by a plurality of first fields. The open-spacing region is located outside the polygon region, and includes a plurality of sub-resolution polygon and second fields, and does not include any main polygons. The system also includes a nearly on-axis illumination (ONI) to expose the EUV mask and optics to direct diffracted lights reflected from the EUV mask towards the semiconductor wafer.

A process of an extreme ultraviolet lithography is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask, an EUV radiation source and an illuminator. The process also includes exposing the EUV mask by a radiation, originating from the EUV radiation source and directed by the illuminator, with a less-than-three-degree chief ray angle of incidence at the object side (CRAO). The process further includes removing most of the non-diffracted light and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

Extreme ultraviolet lithography process

A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer.

Via definition scheme

An apparatus comprises a low EUV reflectivity (LEUVR) mask. The LEUVR mask includes a low thermal expansion material (LTEM) layer; a reflective multilayer (ML) over the LTEM layer; and a patterned absorption layer over the reflective ML. The reflective ML has less than 2% EUV reflectivity.

The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer.

Method to define multiple layer patterns with a single exposure by charged particle beam lithography

An extreme ultraviolet lithography (EUVL) process is disclosed. The process comprises receiving a mask. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) over one surface of the LTEM substrate, a first region having a phase-shifting layer over the reflective ML, and a second region having no phase-shifting layer over the reflective ML. The EUVL process also comprises exposing the mask by a nearly on-axis illumination with partial coherence less than 0.3 to produce diffracted light and non-diffracted light, removing at least a portion of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

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Taipei, Taiwan

Yen-Cheng Lu