Samsung Electronics Co., Ltd.

Yechung Chung

Jungeun Koo

Kyoungsei Choi

Soyoung Lim

Donghan Kim

Chulwoo Kim

Yunseok Choi

Jeong-Kyu Ha

Eunseok Song

Woonbae Kim

Woojae Kim

YoungHoon Ro

Daewoo Son

YoungSang Cho

Kyoungsuk Yang

HanShin Youn

In Won O

Minhwa Jang

A chip-on-film package includes a base film having a top surface and a bottom surface, and a circuit region; a source driver chip and a gate driver chip mounted on the circuit region; a first conductive line on the top surface of the base film, a second conductive line on the bottom surface of the base film, and a conductive via that connects the first and second conductive lines to each other; a first row of bonding pads on the circuit region and connected to the source driver chip; a second row of bonding pads on the circuit region and connected to the source driver chip and the gate driver chip; and a test pad outside the circuit region and connected to the first and second conductive lines and the conductive via.

Chip-on-film packages and display apparatuses including the same

A package substrate film including a film substrate including upper and lower surfaces; a test pattern including an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern to the lower test line pattern; a second test via pattern penetrating the film substrate outside the first test via pattern and connecting the upper test line pattern to the lower test line pattern; and a test pad between the first test via pattern and the second test via pattern, the test pad including first test pad at an outer side of the first test via pattern; and second test pad at an inner side of the second test via pattern and facing the first test pad.

Package substrate film and semiconductor package including the same

Semiconductor devices are provided. A semiconductor device includes a substrate, a controller on the substrate, first and second drive circuits on the substrate, and a plurality of signal lines on the substrate that connect the controller to the first and second drive circuits. The plurality of signal lines are each at the same vertical level and are horizontally spaced apart from each other. Related printed circuit boards are also provided.

Printed circuit boards including drive circuits, and related semiconductor devices

In an embodiment, the film product includes a film substrate having a first surface and a second surface opposite the first surface. The film substrate has a length in a first direction and a width in a second direction perpendicular to the first direction. A first plurality of pads is on one of the first surface and the second surface, and the first plurality of pads is arranged in a third direction, the third direction being diagonal with respect to at least one of the first direction and the second direction. At least one merge line is electrically connecting at least two of the first plurality of pads.

Film product, film packages and package modules using the same

Provided is a semiconductor package including: a semiconductor chip mounted on a die pad; at least one lead connected electrically to the semiconductor chip; and a flexible film substrate including a metal wiring, which electrically connects the semiconductor chip and the at least one lead, wherein the semiconductor chip is electrically connected to the film substrate through a first connection member which contacts the semiconductor chip and the metal wiring; and the film substrate is electrically connected to the at least one lead through a second connection member which contacts the metal wiring and the at least one lead.

Semiconductor packages

Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, the chip mounting area further including an inner area and a peripheral area, the film further including a lower surface, and vias penetrating the film, the vias being located in the inner area, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film. Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, a lower surface, and vias penetrating the film, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film, the vias being located outside of the chip mounting area. Example embodiments are directed to packages including tape wiring substrates.

Tape wiring substrates and packages including the same

A semiconductor package has an interconnection substrate including a first conductive lead and a second longer conductive lead, and a semiconductor chip including a first cell region, a second cell region, a first conductive pad electrically connected to the first cell region and a second conductive pad electrically connected to the second cell region. The semiconductor chip is mounted to the interconnection substrate with the first and second conductive pads both disposed on and connected to the second conductive lead.

Growing community of inventors

Hwaseong-si, South Korea

Yechung Chung