Seiko Epson Corporation

Yasushi Haga

Atsushi Kanda

A procedure of manufacturing a semiconductor device according to the present invention first creates a gate electrode on a center portion of a gate oxide film formed on a substrate, forms a silicon oxide film over the whole surface of the substrate including the gate electrode, and etches the whole face of the silicon oxide film, so as to form a side wall of the silicon oxide film on a side face of the gate electrode. The procedure then implants an impurity ion according to a channel of a target MOS transistor, so as to specify a drain area and a source area. In the process of specifying the drain area and the source area, a resist is formed in advance on at least a peripheral portion of the gate oxide film in a high-breakdown-voltage MOS transistor, so as to prevent implantation of the impurity ion in an under-layer region below the peripheral portion of the gate oxide film. This arrangement enables both a high-breakdown-voltage MOS transistor and a low-breakdown-voltage MOS transistor to be efficiently formed on an identical substrate without damaging the characteristics of the respective transistors.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE, IN WHICH A HIGH-BREAKDOWN-VOLTAGE MOS TRANSISTOR AND A LOW-BREAKDOWN-VOLTAGE MOS TRANSISTOR ARE FORMED ON AN IDENTICAL SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE MANUFACTURED THEREBY

The present invention provides a technique for efficiently forming a high-breakdown voltage transistor and a low-breakdown voltage transistor on the same substrate while reducing the deterioration of each transistor's characteristics. At first, an insulating film is formed. The insulating film portions above the drain and source formation regions for the high-breakdown voltage transistor are thicker than those for the low-breakdown voltage transistor. Next, gates are formed on the insulating film. Then sidewalls are formed on the sides of the low-breakdown voltage transistor gate, and apertures are made in the insulating film portions above the drain and source formation regions for each transistor. When apertures are made in the relatively thick insulating film portions above the drain and source formation regions for the high-breakdown voltage transistor, etching is performed not to narrow widths of the sidewalls formed on the sides of the gate for the low-breakdown voltage transistor. Then drain and source regions are formed for each transistor by introduction of impure elements through the apertures.

Method for manufacturing high-breakdown voltage transistor and low-breakdown voltage transistor on the same substrate

Among first and second oxide films and formed on a substrate , the oxide film in a low-breakdown-voltage transistor area LV is all etched off, while the whole surface of the oxide film in a high-breakdown-voltage transistor area HV is left intact. A sixth oxide film for defining side walls is subsequently formed on the whole surface of the substrate in a greater thickness of approximately 2000 angstrom than a standard thickness. Over-etching of the sixth oxide film defines side walls SW. Non-required portions of the oxide film are then etched off with a resist R A. This causes a drain-source forming region, which is expected to form a drain area and a source area, to be open in an element forming region in a high-breakdown-voltage nMOS area HVn. The resist R A is not removed but is used continuously, and an n-type impurity ion is implanted into the open drain-source forming region. This arrangement enables both a high-breakdown-voltage MOS transistor and a low-breakdown-voltage MOS transistor to be formed efficiently on an identical substrate without damaging the characteristics of the respective MOS transistors.

Method of manufacturing semiconductor device

Among first and second oxide films and formed on a substrate the oxide film in a low-breakdown-voltage transistor area LV is all etched off, while the whole surface of the oxide film in a high-breakdown-voltage transistor area HV is left intact. A sixth oxide film to define a side wall is subsequently formed on the whole surface of the substrate and a resist R is formed over the whole high-breakdown-voltage transistor area HV. Over-etching of the low-breakdown-voltage transistor area LV is carried out to make the surface of the substrate exposed and to define the side wall only in the low-breakdown-voltage transistor area LV. The oxide film is made to remain in the high-breakdown-voltage transistor area HV. Non-required portions of the oxide films and are then etched off with a resist R B. This causes a drain-source forming region, which is expected to form a drain area and a source area, to be open in an element forming region in a high-breakdown-voltage nMOS area HVn. The resist R B is not removed but is used continuously, and an n-type impurity ion is implanted into the open drain-source forming region. This arrangement enables both a high-breakdown-voltage MOS transistor and a low-breakdown-voltage MOS transistor to be formed efficiently on an identical substrate without damaging the characteristics of the respective MOS transistors.

Growing community of inventors

Sakata, Japan

Yasushi Haga