Shanghai Huali Integrated Circuit Corporation

Yaoyu Zhan

Qiwei Wang

Zhigang Zhang

The present application provides a process method for improving reliability of a metal gate high-voltage device. Stacks layers formed over the gate oxide layer and spaced apart from each other. An SiCN layer is deposited to cover tops and sidewalls of the stack layers, and cover bottoms of slots between the stack layers. An HARP layer is deposited to covert the SiCN layer. The HARP layer over the stack layers and the slot regions is covered with a photoresist. Photolithography and etching are sequentially performed to open the HARP layer over the stack layers. The photoresist in the slot regions is reserved. The HARP layer over the stack layers outside the slot regions is removed. The operations are repeated for many times until the slot regions are filled with the HARP layer.

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Shanghai, China

Yaoyu Zhan