Chipmos Technologies (bermuda) Ltd

Chipmos Technologies (shanghai) Ltd.

Yan-Yi Wu

Jie-Hung Chiou

Yong-Chao Qiao

Chih-Lung Huang

Xin-Ming Li

A method of fabricating a chip package structure includes the steps of providing a lead frame having a die pad, plural leads and at least one structure enhancement element. A chip is then disposed on the die pad and plural bonding wires are formed to electrically connect the chip to the leads. Then, an upper encapsulant and a first lower encapsulant are formed on an upper surface and a lower surface of the lead frame, respectively. The first lower encapsulant has plural concaves to expose the structure enhancement element. Finally, the structure enhancement element is etched with use of the first lower encapsulant as an etching mask until the die pad and one of the leads connected by the structure enhancement element, or two of the adjacent leads connected thereby are electrically insulated.

Method of fabricating chip package structure

A method of fabricating a chip package is provided. A thin metal plate having a first protrusion part, a second protrusion part and a plurality of third protrusion parts are provided. A chip is disposed on the thin metal plate, and a plurality of bonding wires for electrically connecting the chip to the second protrusion part and the second protrusion part to the third protrusion parts is formed. An upper encapsulant and a lower encapsulant are formed on the upper surface and the lower surface of the thin metal plate respectively. The lower encapsulant has a plurality of recesses for exposing a portion of the thin metal plate at locations where the first protrusion part, the second protrusion part and the third protrusion parts are connected to one another. Finally, the thin metal plate is etched by using the lower encapsulant as an etching mask.

Method of fabricating chip package

A chip package structure includes a chip, a lead frame, first and second bonding wires, an upper encapsulant, a first lower encapsulant, and a second lower encapsulant. The chip has an active surface, a back surface, and chip bonding pads disposed on the active surface. The lead frame having an upper surface and a lower surface includes a die pad, leads, and at least a bus bar. The back surface of the chip is adhered to the die pad. The leads surround the die pad. The bus bar is disposed between the die pad and the leads. The first bonding wires are connected to the chip bonding pads and the bus bar. The second bonding wires are connected to the bus bar and the leads. The upper encapsulant encapsulates the upper surface of the lead frame, the chip, the first bonding wires, and the second bonding wires.

Chip package structure

A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is disposed therebetween and has a down-set with a height difference from the inner leads. The inner leads are disposed around the die pad. The chip disposed on the die pad has at least one first contact and second contacts. The first bonding wire electrically connects the first contact to the bus bar. The second bonding wire electrically connects the bus bar to one of the inner leads. The third bonding wires electrically connect the other of the inner leads to the second contacts. The lead frame, the chip, the bonding wires are wrapped inside the encapsulant.

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Shanghai, China

Yan-Yi Wu