Realtek Semiconductor Inc.

Ya-Min Chang

Chi-Shao Lai

Hsing-Chen Lu

The present invention provides a control module and a control method thereof for an SDRAM. The control module includes at least one register and a controller. The controller is configured to: control the SDRAM to switch from a bus data access mode to a dynamic pin (DPIN) operating mode; setting value of the at least one register under the DPIN operating mode; and control the SDRAM according to the value of the at least one register.

Control module and control method thereof for synchronous dynamic random access memory

A memory system includes a memory controller, a first memory, and a second memory. The memory controller has a command address port, a chip select port, a first data port, and a second data port. The first memory is coupled to the command address port, the chip select port, and the first data port, and the second memory is coupled to the command address port, the chip select port, and the second data port. The capacity of the second memory is greater than the capacity of the first memory. The memory controller controls the first memory and the second memory simultaneously through the command address port and the chip select port.

Memory system having memories of different capacities

A method for resetting a memory in the computer system includes turning on the computer system, and a memory controller of the computer system executing a boot code to initialize the memory. After the memory controller executes the boot code, the memory controller updates a programmable initialization code according to the boot code to generate an updated programmable initialization code. After resetting the computer system, the memory controller executes the updated programmable initialization code to restore the memory back to a default state. After the memory is restored to the default state, the memory controller executes the boot code to initialize the memory again. After the memory is initialized, the memory controller controls the memory to perform a normal operation.

Method for resetting a memory in a computer system

This invention discloses a memory control circuit and a method thereof. The memory control method includes the steps of: transmitting a first clock to a serial peripheral interface (SPI) NOR flash memory; transmitting a read instruction to the SPI NOR flash memory; waiting for a read waiting time period, which is associated with a specification of the SPI NOR flash memory and a cycle of the first clock; waiting for a delay time period, which is associated with a delay setting value and a cycle of a second clock different from the first clock; receiving read data returned from the SPI NOR flash memory; and adjusting the delay time period according to whether the read data are correct or not. This invention improves the stability of read operation of the SPI NOR flash memory and has advantages of simple circuit and flexible adjustment.

Memory control circuit and method thereof

A processor includes a plurality of storage modules and an arbiter, where the storage modules are arranged for storing a plurality of read/write commands, respectively, and the read/write commands are arranged to read/write a memory external to the processor; and the arbiter is coupled to the storage modules, and is arranged to receive the read/write commands from the storage modules, and arrange a sequence of the read/write commands for transmitting to a memory controller.

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Kaohsiung, Taiwan

Ya-Min Chang