Taiwan Semiconductor Manufacturing Comp. Ltd.

Ya-Jen Sheuh

Ren-Dou Lee

Yi-Hsun Chiu

Chien-Wei Chang

Yuan-Hsin Chi

Yi-Chih Chang

Hung-Lin Chen

Sheng-Tai Peng

Shih-Chung Chen

Yi-Shao Lin

Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.

Methods for wafer bonding

Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.

Multi-layered windows for use in chemical-mechanical planarization systems

Growing community of inventors

Hsin-Chu, Taiwan

Ya-Jen Sheuh