Cree Gmbh

Kyma Technologies, Inc.

Advanced Technology Materials, Inc.

Other

Nantero, Inc.

Candescent Technologies Corporation

Silicon Video, Inc.

Candescent Intellectual Property Services, Inc.

Xueping Xu

George R Brandes

Robert P Vaudo

Andrew David Hanser

Edward Preble

N Mark Williams

Lianghong Liu

Jeffrey S Flynn

Denis Tsvetkov

John M Macaulay

Charles P Beetz

Christopher J Spindt

Bob Lee Mackey

Michael James Nystrom

Shiyou Pei

Roger W Barton

George B Hopple

Kollengode S Narayanan

Colin D Stanners

Donald R Schropp, Jr

Robert W Boerstler

Ronald S Besser

Sudhakar Gopalakrishnan

Barbara E Landini

Swayambu V Ramani

John W Steinbeck

J Donald Carruthers

Luping Wang

David Keogh

Nathaniel Mark Williams

David M Keogh

Chris S Christos

Group III (Al, Ga, In)N single crystals, articles and films useful for producing optoelectronic devices (such as light emitting diodes (LEDs), laser diodes (LDs) and photodetectors) and electronic devices (such as high electron mobility transistors (HEMTs)) composed of III-V nitride compounds, and methods for fabricating such crystals, articles and films.

Group III nitride articles and methods for making same

Group III nitride articles having nucleation layers, transitional layers, and bulk layers

In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. A bulk GaN layer is grown on the transitional layer by HVPE under the substantially 2D growth mode. A polycrystalline GaN layer is grown on the bulk GaN layer to form a GaN/substrate bi-layer. The GaN/substrate bi-layer may be cooled from the growth temperature to an ambient temperature, wherein GaN material cracks laterally and separates from the substrate, forming a free-standing article.

Single crystal group III nitride articles and method of producing same by HVPE method incorporating a polycrystalline layer for yield enhancement

Large area single crystal III-V nitride material having an area of at least 2 cm, having a uniformly low dislocation density not exceeding 3&#xd7;10dislocations per cmof growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 10pits/cmof the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Low dislocation density III-V nitride substrate including filled pits and process for making the same

A method and apparatus for manufacture of carbon nanotubes, in which a substrate is contacted with a hydrocarbonaceous feedstock containing a catalytically effective metal to deposit the feedstock on the substrate, followed by oxidation of the deposited feedstock to remove hydrocarbonaceous and carbonaceous components from the substrate, while retaining the catalytically effective metal thereon, and contacting of the substrate having retained catalytically effective metal thereon with a carbon source material to grow carbon nanotubes on the substrate. The manufacture can be carried out with a petroleum feedstock such as an oil refining atmospheric tower residue, to produce carbon nanotubes in high volume at low cost. Also disclosed is a composite including porous material having single-walled carbon nanotubes in pores thereof.

Production of carbon nanotubes

Method for making group III nitride articles

A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the &#x3c;0001&#x3e;direction predominantly towards either the &#x3c;110&#x3e; or the &#x3c;100&#x3e; family of directions. For a &#x3c;110&#x3e; off-cut substrate, a laser diode cavity may be oriented along the &#x3c;100&#x3e; direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a &#x3c;100&#x3e; off-cut substrate, the laser diode cavity may be oriented along the &#x3c;100&#x3e; direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

Orientation of electronic devices on mis-cut substrates

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 10, nitrogen source material partial pressure in a range of from about 1 to about 10torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 10microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

III-V nitride homoepitaxial material of improved quality formed on free-standing (Al,In,Ga)N substrates

In a method for making an inclusion-free uniformly semi-insulating GaN crystal, an epitaxial nitride layer is deposited on a substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode, wherein a surface of the nucleation layer is substantially covered with pits and the aspect ratio of the pits is essentially the same. A GaN transitional layer is grown on the nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. After growing the transitional layer, a surface of the transitional layer is substantially pit-free. A bulk GaN layer is grown on the transitional layer by HVPE. After growing the bulk layer, a surface of the bulk layer is smooth and substantially pit-free. The GaN is doped with a transition metal during at least one of the foregoing GaN growth steps.

Inclusion-free uniform semi-insulating group III nitride substrates and methods for making same

A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the &#x3c;0001&#x3e; direction predominantly toward a direction selected from the group consisting of &#x3c;10-10&#x3e; and &#x3c;11-20&#x3e; directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50&#xd7;50 &#x3bc;mAFM scan that is less than 1 nm, and a dislocation density that is less than 3 E6 cm. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. Both upper and lower surfaces may be offcut. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

Vicinal gallium nitride substrate for high quality homoepitaxy

Large area, uniformly low dislocation density GaN substrate and process for making the same

A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate (). In an illustrative implementation, a laser diode is oriented on a GaN substrate () wherein the GaN substrate includes a GaN (0001) surface off-cut from the &#x3c;0001&#x3e; direction predominantly towards either the &#x3c;1120&#x3e; or the &#x3c;1100&#x3e; family of directions. For a &#x3c;1120&#x3e; off-cut substrate, a laser diode cavity () may be oriented along the &#x3c;1100&#x3e; direction parallel to lattice surface steps () of the substrate () in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For &#x3c;1100&#x3e; off-cut substrate, the laser diode cavity may be oriented along the &#x3c;1100&#x3e; direction orthogonal to lattice surface steps () of the substrate () in order to provide a cleave laser facet that is aligned with the surface lattice steps.

Laser diode orientation on mis-cut substrates

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Stamford, CT, United States of America

Xueping Xu