Nxp Usa, Inc.

Freescale Semiconductor,inc.

Xingshou Pang

Jinzhong Yao

Zhigang Bai

Xuesong Xu

Meng Kong Lye

Nan Xu

Jun Li

Leo M Higgins, Iii

Burton Jesse Carpenter

Fred T Brauchler

Mariano Layson Ching, Jr

Junhua Luo

Jinmei Liu

Jianhong Wang

Yuan Zang

Shunan Qiu

Guoliang Gong

Beiyue Yan

Yinghui Li

Mingchuan Han

Jian Song

Yadong Wei

An integrated circuit package is formed by positioning an integrated circuit die on a die pad of a leadframe; connecting a bond wire between the die and a bond pad of the leadframe; encapsulating the bond wire, die, and bond pad with an encapsulant material to form a first mold cap of the integrated circuit package; after the encapsulating, bending one or more leads of the leadframe to form one or more bent leads; and encapsulating the first mold cap and a portion of a bend of the one or more bent leads with the encapsulant material to form a second mold cap.

Integrated circuit package and method to manufacture the integrated circuit package to reduce bond wire defects in the integrated circuit package

A mold chase has first and second mold clamps having corresponding teeth and recesses configured such that, when the mold chase is closed onto a sub-assembly having an IC die mounted onto and wire-bonded to a lead frame, there are gaps between the recesses and the leads of the lead frame that allow molding compound to extend along opposing sides of proximal ends of the leads to increase the metal-to-metal distance between adjacent leads, thereby reducing the chances of, for example, tin migrating during HAST testing to form undesirable conduction paths between adjacent leads. In some embodiments, the mold clamp teeth have chamfered edges that are tapered at the mold chase cavity to form wedge-shaped gaps that allow the molding compound to extrude along the proximal ends of the leads of MaxQFP packages having two levels of 'J' leads and gullwing leads.

Protection from metal migration on IC packages

A lead frame for a packaged integrated circuit (IC) device has a die receiving area and leads that extend outwardly from the die receiving area. The leads have an inner lead area proximate the die receiving area and an outer lead area distant from the die receiving area. Notches are formed in a surface of alternate ones of the leads, in the inner lead area proximate to the outer lead area. The notches facilitate bending of the alternate leads when the leads are subjected to a downward force by a mold tool, such that one set of leads lies in a first plane and another set lies in a second plane spaced from the first plane. The leads in the first plane can be formed into Gull Wing leads and the other set of leads into J-leads.

Lead frame with bendable leads

A packaged integrated circuit (IC) device includes a first IC die with a first inductor, a first layer of adhesive on a first major surface of the first IC die, an isolation layer over the first layer of adhesive, a second layer of adhesive on the isolation layer, a second IC die on the second layer of adhesive, and a second inductor in the second IC die aligned to communicate with the first inductor. The isolation layer extends a prespecified distance beyond a first edge of the second IC die.

Packaged integrated circuit having stacked die and method for therefor

A lead frame for a packaged integrated circuit (IC) device has alternating first and second leads that protrude from a package body in respective first and second planes, where the second plane is parallel to and below the first plane. The first leads are formed into Gull Wing shaped leads and the second leads are formed into J-shaped leads. Inner lead portions of the first and second leads are maintained in the first plane with a tape. An inner lead portion of each of the second leads, proximate to and extending to the outer lead portion, is down-set, so that when the outer lead portion is pressed down by a mold tool to locate the outer lead portion of the second leads in the second plane, the inner lead portion of the second leads is maintained in the first plane and does not separate from the tape.

Lead frame for integrated circuit device having J-leads and Gull Wing leads

A lead frame for a packaged integrated circuit (IC) device has alternating first and second leads that protrude from a package body in respective first and second planes, where the second plane is parallel to and below the first plane. The first leads are formed into Gull Wing shaped leads and the second leads are formed into J-shaped leads. Inner lead portions of the first and second leads are maintained in the first plane with a tape. An inner lead portion of each of the second leads includes a deformation area that facilitates maintaining the tape in contact with the inner lead area of the second leads, even when a mold tool presses down on an outer lead side of the second leads to place the outer lead ends of the second leads in the second plane.

Lead frame for integrated circuit device having J-leads and gull wing leads

Embodiments of a lead frame for a packaged semiconductor device are provided, one embodiment including: a die pad; a first row of active lead fingers that are laterally separated from one another along their entire length; a package body perimeter that indicates placement of a package body of the packaged semiconductor device, wherein the package body perimeter is located laterally around the die pad; a first dummy lead finger positioned in parallel next to an initial active lead finger of the first row of active lead fingers, wherein the first dummy lead finger and the initial active lead finger are laterally separated from one another along their entire length, and wherein the first dummy lead finger is separated from the package body perimeter by a gap distance; and a first tie bar connected to an outside edge of the first dummy lead finger.

Lead frame with dummy leads for burr mitigation during encapsulation

Tooling for molding a packaged semiconductor device includes a clamping plate, a cavity bar, and an attachment mechanism. The cavity bar has a mold half that has a mold cavity for molding the packaged semiconductor device. The mold half has teeth and a space between pairs of adjacent teeth. The teeth and the spaces support bending of leads of a lead frame of the packaged semiconductor device. The attachment mechanism affixes the cavity bar to the clamping plate and permits the cavity bar to slide relative to the clamping plate. This sliding of the cavity bar enables proper alignment with a mating cavity bar to reduce the likelihood of resin bleed.

Floating mold tool for semicondcutor packaging

A method for assembling a packaged semiconductor device includes mounting a pressure-sensing die onto a die paddle of a metal lead frame. A pressure-sensitive gel is dispensed into a recess of a lid, and the lead frame is mated with the lid such that the pressure-sensing die is immersed in the pressure-sensitive gel within the recess of the lid.

Packaged semiconductor sensor device with lid

A Quad Flat Non-leaded (QFN) semiconductor package has a semiconductor die mounted on a die flag of a lead frame. A molded housing with a base and sides covers the die. The package has electrically conductive mounting feet each of which includes an exposed base surface in the base of the housing, an opposite parallel surface covered by the housing, and an exposed end surface in the one of the sides of the housing. The exposed end surface is normal to, and located between, the exposed base surface and the opposite parallel surface. Bond wires selectively electrically connect electrodes of the die to respective ones of the mounting feet. An electrically conductive plating coats the exposed base portion and exposed end surface of the mounting feet.

Quad flat non-leaded semiconductor package with wettable flank

A semiconductor package and method of assembling a semiconductor package includes encapsulating a first pre-packaged semiconductor die stacked on top of and interconnected with a second semiconductor die. The first packaged semiconductor die is positioned and fixed relative to a lead frame with a temporary carrier such as tape. The second semiconductor die is attached and interconnected directly to the first packaged semiconductor die and lead frame. The interconnected first packaged die and second semiconductor die, and lead frame are encapsulated to form the semiconductor package. Different types of semiconductor packages such as quad flat no-lead (QFN) and ball grid array (BGA) may be formed, which provide increased input/output (I/O) count and functionality.

Stacked die semiconductor package

A no-lead type semiconductor package is formed by attaching a die to a top surface of a flag of a lead frame and then taping a bottom surface of the flag and leads of the lead frame. Die bonding pads are connected to the leads with wires and then the assembly is put in a mold chase and encapsulated with a plastic material. The mold chase has protrusions between the flag and the leads of a lead frame, and between the leads themselves, which causes indentations to be formed between the leads and between the flag and the leads. The method is particularly useful for making quad flat no lead (QFN) devices and power-QFN type devices.

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Tianjin, China

Xingshou Pang