Micron Technology Incorporated

Xiaolong Fang

Fatma Arzum Simsek-Ege

Lifang Xu

Thomas Gehrke

Baosuo Zhou

Farrell Martin Good

Zailong Bian

Tingkai Li

Michael A Smith

Tuman Earl Allen, Iii

Ramakanth Alapati

Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor devices includes forming spaced-apart structures at a dicing street located between neighboring device growth regions of a substrate material. The method can further include epitaxially growing a semiconductor material by adding a first portion of semiconductor material to the device growth regions and adding a second portion of semiconductor material to the structures. The method can still further include forming semiconductor devices at the device growth regions, and separating the semiconductor devices from each other at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.

Semiconductor growth substrates and associated systems and methods for die singulation

A method of forming a plurality of spaced features includes forming sacrificial hardmask material over underlying material. The sacrificial hardmask material has at least two layers of different composition. Portions of the sacrificial hardmask material are removed to form a mask over the underlying material. Individual features of the mask have at least two layers of different composition, with one of the layers of each of the individual features having a tensile intrinsic stress of at least 400.0 MPa. The individual features have a total tensile intrinsic stress greater than 0.0 MPa. The mask is used while etching into the underlying material to form a plurality of spaced features comprising the underlying material. Other implementations are disclosed.

Method of forming a plurality of spaced features

Methods and apparatus are provided. An isolation region is formed by lining a trench formed in a substrate with a first dielectric layer by forming the first dielectric layer adjoining exposed substrate surfaces within the trench using a high-density plasma process, forming a layer of spin-on dielectric material on the first dielectric layer so as to fill a remaining portion of the trench, and densifying the layer of spin-on dielectric material.

Isolation regions

Trench isolation structures and methods to form same for use in the manufacture of semiconductor devices are described. The trench isolation structures are formed using several processing schemes that utilize disclosed dry etching processes to form a significant depth &#x394; between an array trench depth and a periphery trench depth. One etching method creates a trench delta depth utilizing a single dry etch step, while two other etching methods create a trench &#x394; depth by utilizing three dry etch steps.

Fabrication processes for forming dual depth trenches using a dry etch that deposits a polymer

Among structures, methods, devices, and systems for isolation trenches, a semiconductor device is provided that includes a substrate and an isolation trench structure. One such isolation trench structure includes a first isolation trench portion associated with a surface of the substrate and having a first pair of opposing sidewalls that are each substantially perpendicular to the surface of the substrate. A second isolation trench portion includes a second pair of sidewalls within the substrate that are each angled obliquely with respect to the surface of the substrate, where the second isolation trench portion has a separation between the second pair of sidewalls that decreases as a distance from the first isolation trench portion increases. A third isolation trench portion includes a third pair of sidewalls within the substrate that are each substantially perpendicular to the surface of the substrate.

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Boise, ID, United States of America

Xiaolong Fang