Synopsys, Inc.

Synopsis Incorporated

Xiaolei Cai

Ruifeng Guo

Brian Archer

Kevin Chau

Emil I Gizdarski

William Albert Lloyd

Christopher Kevin Allsup

Disclosed is cell-aware defect characterization by considering inter-cell timing. Also disclosed is a method and apparatus that determines whether a defect can be detected in a standard library cell used to design an integrated circuit. A defect detection table is generated that indicates whether particular defects can be detected with particular combinations of input logic states and under varying load conditions. Results are merged to provide a single metric for each combination of input and output logic states that indicates one of three possible results for each defect: (1) whether the defect can be detected under all load conditions, (2) whether the defect can be detected only under some load conditions; or (3) whether the defect cannot be detected for the particular combination of input logic states regardless of the load conditions.

Cell-aware defect characterization by considering inter-cell timing

A cell-aware defect characterization method includes partitioning a multibit cell netlist file into multiple single-bit partition netlist files, and then generating a cell-aware test model for each partition netlist file. Partitioning is performed such that each partition netlist file includes a corresponding flip-flop along with input, output and control pins that are operably coupled to the input, output and control terminals of the corresponding flip-flop, and all active, passive and parasitic circuit elements that are coupled in the signal paths extending between the corresponding flip-flop and the input/output/control pins. Shared resources (e.g., clock or scan select pins and associated signal lines) that are utilized by two or more flip-flops are included in each associated partition. The partitioning process is performed using either a structural back-tracing approach or a logic simulation approach.

Cell-aware defect characterization for multibit cells

A computer-implemented method for characterizing a circuit is presented. The method includes receiving, by the computer, data representative of the circuit and at least one defect of the circuit. The method further includes simulating, using the computer, the circuit to obtain a first timing characteristic, and simulating, using the computer, the circuit with the at least one defect to obtain a second timing characteristic. The method further includes identifying, using the computer, an association between at least one test vector and the at least one defect in accordance with the first timing characteristic, the second timing characteristic, and a multitude of strobes applied during a first time interval associated with the at least one test vector, when the computer is invoked to characterize the circuit.

Cell-aware defect characterization and waveform analysis using multiple strobe points

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Portland, OR, United States of America

Xiaolei Cai