United Microelectronics Corp.

Wu-Chun Kao

Yu-Ren Wang

Shu-Yen Chan

Chien-Liang Lin

Ying-Wei Yen

Ying-Hsuan Li

The present invention relates to a method for gate leakage reduction and Vt shift control, in which a first ion implantation is performed on PMOS region and NMOS region of a substrate to implant fluorine ions, carbon ions, or both in the gate dielectric or the semiconductor substrate, and a second ion implantation is performed only on the NMOS region of the substrate to implant fluorine ions, carbon ions, or both in the gate dielectric or the semiconductor substrate in the NMOS region, with the PMOS region being covered by a mask layer. Thus, the doping concentrations obtained by the PMOS region and the NMOS region are different to compensate the side effect caused by the different equivalent oxide thickness and to avoid the Vt shift.

Growing community of inventors

Taoyuan County, Taiwan

Wu-Chun Kao