Infineon Technologies Ag

Altis Semiconductor

Woosik Kim

Chanro Park

Gill Yong Lee

A method of forming dual interconnects in a magnetoresistive memory cell includes: providing an intermediate product including: a metallization layer including metallic lines; a magnetoresistive junction element conductively connected to a first of the metallic lines by a via through a first non-conductive layer; a metallic hard mask disposed on the magnetoresistive junction element; a second non-conductive layer above the first non-conductive layer in regions over the hard mask and a second of the metallic lines; a third non-conductive layer disposed above the hard mask; and a fourth non-conductive layer disposed on the third non-conductive layer. The method further includes partially opening first and second trenches to uncover the second non-conductive layer above the hard mask and second metallic line, respectively; fully opening the first and second trenches to uncover the hard mask and second metallic line, respectively; and filling the first and second trenches with conductive material.

Method of forming dual interconnects in manufacturing MRAM cells

A method of fabricating a magnetic memory device and a magnetic memory device structure. A buffer insulating layer is deposited over the top surface of the conductive hard mask of a magnetic memory cell. The buffer insulating layer is left remaining over the conductive hard mask top surface while the various material layers of the device are patterned and etched. The buffer insulating layer prevents the conductive hard mask top surface from being damaged during plasma-containing processes.

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Boissettes, France

Woosik Kim