Samsung Electronics Co., Ltd.

Woong-chul Shin

Sang-Moo Choi

Sang-jin Park

Kwang-soo Seol

Jung-hun Sung

Jae-Ho Lee

Youn-Seon Kang

Jae-young Choi

Sang-mock Lee

Yoon-Ho Khang

Eun-ha Lee

Jin-seo Noh

Kyung-sang Cho

Jong-bong Park

Youn-seon Kang

Jang-ho Lee

A phase change memory device including a phase change layer includes a storage node and a switching device. The switching device is connected to the storage node. The storage node includes a phase change layer selectively grown directly on a lower electrode. In a method of manufacturing a phase change memory device, an insulating interlayer is formed on a semiconductor substrate to cover a switching device. A lower electrode connected to the switching device is formed, and a phase change layer is selectively grown directly on the lower electrode.

Phase change memory devices including phase change layer formed by selective growth methods and methods of manufacturing the same

Crystalline aluminum oxide layers having increased energy band gap, charge trap memory devices including crystalline aluminum oxide layers and methods of manufacturing the same are provided. A method of forming an aluminum oxide layer having an increased energy band gap includes forming an amorphous aluminum oxide layer on a lower film, introducing hydrogen (H) or hydroxyl group (OH) into the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer including the H or OH.

Crystalline aluminum oxide layers having increased energy band gap, charge trap layer devices including crystalline aluminum oxide layers, and methods of manufacturing the same

Provided is a method of forming an aluminum oxide layer and a method of manufacturing a charge trap memory device using the same. The method of forming an aluminum oxide layer may include forming an amorphous aluminum oxide layer on an underlying layer, forming a crystalline auxiliary layer on the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer. Forming the crystalline auxiliary layer may include forming an amorphous auxiliary layer on the amorphous aluminum oxide layer; and crystallizing the amorphous auxiliary layer.

Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same

A method of forming a phase change layer using a Ge compound and a method of manufacturing a phase change memory device using the same are provided. The method of manufacturing a phase change memory device included supplying a first precursor on a lower layer on which the phase change layer is to be formed, wherein the first precursor is a bivalent precursor including germanium (Ge) and having a cyclic structure. The first precursor may be a cyclic germylenes Ge-based compound or a macrocyclic germylenes Ge-based, having a Ge&#x2014;N bond. The phase change layer may be formed using a MOCVD method, cyclic-CVD method or an ALD method. The composition of the phase change layer may be controlled by a deposition pressure in a range of 0.001 torr-10 torr, a deposition temperature in a range of 150&#xb0; C. to 350&#xb0; C. and/or a flow rate of a reaction gas in the range of 0-1 slm.

Method of forming phase change layer using a germanium precursor and method of manufacturing phase change memory device using the same

A method of forming a phase change layer may include providing a bivalent first precursor having germanium (Ge), a second precursor having antimony (Sb), and a third precursor having tellurium (Te) onto a surface on which the phase change layer is to be formed. The phase change layer may be formed by CVD (e.g., MOCVD, cyclic-CVD) or ALD. The composition of the phase change layer may be varied by modifying the deposition pressure, deposition temperature, and/or supply rate of reaction gas. The deposition pressure may range from about 0.001-10 torr, the deposition temperature may range from about 150-350&#xb0; C., and the supply rate of the reaction gas may range from about 0-1 slm. Additionally, the above phase change layer may be provided in a via hole and bounded by top and bottom electrodes to form a storage node.

Method of forming a phase change layer and method of manufacturing a storage node having the phase change layer

A method of surface treating a phase change layer may include, before forming the phase change layer, forming a coating layer on a surface of a bottom layer on which the phase change layer is to be formed, wherein the coating layer has a chemical structure for contributing to the adherence of an alkyl radical to the surface of the bottom layer. After forming the coating layer, the phase change layer may be formed using an atomic layer deposition (ALD) method.

Method of surface treating a phase change layer and method of manufacturing a phase change memory device using the same

Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers

A phase change memory device and a method of manufacturing the phase change memory device are provided. The phase change memory device may include a switching element and a storage node connected to the switching element, wherein the storage node includes a bottom electrode and a top electrode, a phase change layer interposed between the bottom electrode and the top electrode, and a titanium-tellurium (Ti&#x2014;Te)-based diffusion barrier layer interposed between the top electrode and the phase change layer. The Ti&#x2014;Te based diffusion barrier layer may be a TiTelayer wherein x may be greater than 0 and less than 0.5.

Storage node including diffusion barrier layer, phase change memory device having the same and methods of manufacturing the same

A method of fabricating a phase change RAM (PRAM) having a fullerene layer is provided. The method of fabricating the PRAM may include forming a bottom electrode, forming an interlayer dielectric film covering the bottom electrode, and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film, forming a bottom electrode contact plug by filling the bottom electrode contact hole with a plug material, forming a fullerene layer on a region including at least an upper surface of the bottom electrode contact plug and sequentially stacking a phase change layer and an upper electrode on the fullerene layer. The method may further include forming a switching device on a substrate and a bottom electrode connected to the switching device, forming an interlayer dielectric film covering the bottom electrode and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film.

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Suwon-si, South Korea

Woong-chul Shin