Samsung Electronics Co., Ltd.

Woojae Jang

Jaeduk Lee

Sejun Park

Sunyeong Lee

Kyungmoon Kim

Chanjong Ju

Jung Hoon Lee

Jinkyu Kang

Jin-Kyu Kang

Raeyoung Lee

Changsub Lee

Soyeong Gwak

Changhwan Shin

An operating method of a storage device includes reading a wear-out pattern of a memory block when a controller determines the memory block is a re-use memory block of a non-volatile memory device; selecting an operation mode corresponding to the read wear-out pattern using the controller; and transmitting the selected operation mode to the non-volatile memory device using the controller.

Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device including the same

A three-dimensional semiconductor memory device including a stack structure including gate structures and first dielectric patterns alternately stacked, a vertical channel penetrating the stack structure, and a charge storage layer extending from between the vertical channel and the first gate structures to between the vertical channel and the first dielectric patterns. The gate structures include first gate structures having a top surface and a bottom surface facing each other and having different width. The charge storage layer includes first segments between the vertical channel and the first gate structures, and second segments between the vertical channel and the first dielectric patterns. A thickness of the first segments is greater than a thickness of the second segments. One of the width of the top surface and the width of bottom surface of each first gate structure is the same as that of a first dielectric pattern on the first gate structure.

Three-dimensional semiconductor memory device

A nonvolatile memory device includes a memory cell array, an erase body voltage generator, and an erase source voltage generator. The memory cell array includes memory blocks, each of which includes cell strings each including a ground selection transistor, memory cells, and a string selection transistor stacked in a direction perpendicular to a substrate. The erase body voltage generator applies an erase body voltage to the substrate during an erase operation. The erase source voltage generator applies an erase source voltage to a common source line connected with ground selection transistors of the cell strings during the erase operation.

Nonvolatile memory device and memory system including nonvolatile memory device that controls the erase speeds of cell strings

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Hwaseong-si, South Korea

Woojae Jang