Samsung Electronics Co., Ltd.

Semes Co., Ltd.

Pukyong National University

Woo-Gwan Shim

Chang-ki Hong

Jeong-Nam Han

Jung-Min Oh

Kun-Tack Lee

Sang-jun Choi

Im-Soo Park

Hyo-San Lee

Ji-Hoon Cha

Sang-Yong Kim

Chang-Ki Hong

Dae-Hyuk Kang

Chang-Sup Mun

Yong-Sun Ko

Yu-Kyung Kim

Doo-Won Kwon

Kwon-Taek Lim

Ha-Soo Hwang

Haldorai Yuvaraj

Jae-Mok Jung

Bo-un Yoon

Young-Hoo Kim

Woo-Young Kim

Boong Kim

Jeong-Yong Bae

Hyun-Jung Lee

Se-Jin Park

Dong-Gyun Han

Hyung-Ho Ko

Won-Ho Jang

Young-sun Kim

Jong-Won Lee

Cha-young Yoo

Jae-hyoung Choi

Seung-Ho Lee

Han-Ku Cho

Woo-Sung Han

Se-hoon Oh

Jung-hee Chung

Sang Jun Choi

Jung-min Oh

Sang-yong Kim

Jeong-sik Choi

Bo-Wo Choi

Sang-jine Park

Ho-wook Choi

A substrate processing apparatus includes: a spin chuck, on which a substrate is mounted, the spin chuck rotating the substrate; At least one of a chemical liquid nozzle configured to provide a chemical liquid to a surface of the substrate and a deionzed water nozzle configured to provide a deionized water to a surface of the substrate; and a laser device configured to emit a pulse waver laser beam having a period of 10seconds or less for etching an edge of the substrate.

Substrate processing apparatus

A substrate processing apparatus includes a chamber providing a space in which a substrate is processed, a first substrate support within the chamber and configured to support the substrate when the substrate is loaded into chamber, a second substrate support within the chamber and configured to support the substrate in a height greater than the height in which the first substrate supports the substrate, a first supply port through which a supercritical fluid is supplied to a first space under the substrate of a chamber space, a second supply port through which the supercritical fluid is supplied to a second space above the substrate of the chamber space, and an exhaust port through which the supercritical fluid is exhausted from the chamber.

Substrate processing apparatus and substrate processing system including the same

Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Etching, cleaning and drying methods using supercritical fluid and chamber systems using these methods

In a method of forming a capacitor, a first mold layer pattern including a first insulating material may be formed on a substrate. The first mold layer pattern may have a trench. A supporting layer including a second insulating material may be formed in the trench. The second insulating material may have an etching selectivity with respect to the first insulating material. A second mold layer may be formed on the first mold layer pattern and the supporting layer pattern. A lower electrode may be formed through the second mold layer and the first mold layer pattern. The lower electrode may make contact with a sidewall of the supporting layer pattern. The first mold layer pattern and the second mold layer may be removed. A dielectric layer and an upper electrode may be formed on the lower electrode and the supporting layer pattern.

Integrated circuit capacitors having sidewall supports

A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.

Transistor having a metal nitride layer pattern, etchant and methods of forming the same

Methods of forming integrated circuit capacitors having sidewall supports and capacitors formed thereby

This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Methods of fabricating a semiconductor device using a dilute aqueous solution of an ammonia and peroxide mixture

A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.

Semiconductor device having capacitor

A cleaning solution and methods of fabricating semiconductor devices using the same are provided. A cleaning solution used for cleaning a silicon surface and methods of fabricating a semiconductor device using the same are also provided. The cleaning solution may include 0.01 to 1 wt % of fluoric acid, 20 to 50 wt % of oxidizer and 50 to 80 wt % of water. The cleaning solution may further include 1 to 20 wt % of acetic acid. The cleaning solution may be used to clean a silicon surface exposed during fabrication processes of a semiconductor device. The cleaning solution may reduce damage of other material layers (e.g., a tungsten layer or a silicon oxide layer) and enable the silicon surface to be selectively etched.

Cleaning solution for silicon surface and methods of fabricating semiconductor device using the same

A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.

Method of forming a spacer

Semiconductor device having capacitor and method of fabricating the same

A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.

Method of forming fine pitch hardmask patterns and method of forming fine patterns of semiconductor device using the same

Growing community of inventors

Yongin-si, South Korea

Woo-Gwan Shim