Applied Materials, Inc.

Wonseok Lee

Usama Dadu

Kartik Ramaswamy

Hamid Noorbakhsh

Jason C Della Rosa

Jisoo Kim

Vladimir Knyazik

Haitao Wang

Daniel John Hoffman

Steven C Shannon

Chunlei Zhang

Sergio Fukuda Shoji

Douglas H Burns

Daisuke Shimizu

Jang Gyoo Yang

Kwang-Soo Kim

Li Ling

Kevin Choi

David K Carlson

Zhiyuan Ye

Errol Antonio C Sanchez

Xinyu Bao

Shawming Ma

Ankur Agarwal

Kenny Linh Doan

Katsumasa Kawasaki

Justin Phi

Judy Wang

Shing-Li Sung

Embodiments of showerheads having a detachable gas distribution plate are provided herein. In some embodiments, a showerhead for use in a semiconductor processing chamber may include a base having a first side and a second side opposing the first side; a gas distribution plate disposed proximate the second side of the base, wherein the gas distribution plate is formed from a material having an electrical resistivity between about 60 ohm-cm to 90 ohm-cm; a clamp disposed about a peripheral edge of the gas distribution plate to removably couple the gas distribution plate to the base; and a thermal gasket disposed in a gap between the base and gas distribution plate.

Showerhead having a detachable high resistivity gas distribution plate

A method and apparatus for de-chucking a workpiece is described that uses a swing voltage sequence. One example pertains to a method that includes applying a mechanical force from an electrostatic chuck against the back side of a workpiece that is electrostatically clamped to the chuck, applying a sequence of voltage pulses with a same polarity to the electrodes, each pulse of the sequence having a lower voltage than the preceding pulse, each pulse of the sequence having a lower voltage than the preceding pulse, and determining whether the workpiece is released from the chuck after the sequence of additional voltage pulses and if the workpiece is not released then repeating applying the sequence of voltage pulses.

Method and apparatus for de-chucking a workpiece using a swing voltage sequence

Embodiments of showerheads having a detachable gas distribution plate are provided herein. In some embodiments, a showerhead for use in a semiconductor processing chamber may include a body having a first side and a second side opposing the first side; a gas distribution plate disposed proximate the second side of the body, wherein the gas distribution plate is formed from a material having an electrical resistivity between about 60 ohm-cm to 90 ohm-cm; a clamp disposed about a peripheral edge of the gas distribution plate to removably couple the gas distribution plate to the body; and a thermal gasket disposed in a gap between the body and gas distribution plate.

Embodiments include a plasma processing method for cleaning polymer byproducts from interior surfaces of the plasma chamber. In an embodiment the plasma process may include processing a workpiece in a plasma processing chamber. Thereafter, the method may include removing the workpiece from the processing chamber. After the workpiece is removed, embodiments may include cleaning the plasma processing chamber with a cleaning process that includes a high pressure cleaning process, a first low pressure cleaning process, and a second low pressure cleaning process, wherein the second low pressure cleaning process includes applying a pulsed bias.

Using bias RF pulsing to effectively clean electrostatic chuck (ESC)

Methods and apparatus for boosting ion energies are contemplated herein. In one embodiment, the methods and apparatus comprises a controller, a process chamber with a symmetrical plasma source configured to process a wafer, one or more very high frequency (VHF) sources, coupled to the process chamber, to generate plasma density and two or more frequency generators that generate low frequencies relative to the one or more VHF sources, coupled to a bottom electrode of the process chamber, the two or more low frequency generators configured to dissipate energy in the plasma sheath, wherein the controller controls the one or more VHF sources to generate a VHF signal and the two or more low frequency sources to generate two or more low frequency signals.

Method and apparatus for ion energy distribution manipulation for plasma processing chambers that allows ion energy boosting through amplitude modulation

Methods of operating a plasma enhanced substrate processing system using multi-level pulsed RF power are provided herein. In some embodiments, a method of operating a plasma enhanced substrate processing system using multi-level pulsed RF power includes providing a first multi-level RF power waveform to a process chamber, the first multi-level RF power waveform having at least a first power level, a second power level, and a third power level, providing, after a first delay period, a second multi-level RF power waveform to the process chamber, the second multi-level RF power waveform having at least a first power level, a second power level, and a third power level, and processing the substrate using the first multi-level RF power waveform and the second multi-level RF power waveform to produce a features on the substrate have an aspect ratio of greater than 60:1 while maintaining an etch rate of greater than 170 nm/min.

Smart multi-level RF pulsing methods

Embodiments described herein generally relate to a method of fabrication of a device structure comprising Group III-V elements on a substrate. A &#x3c;111&#x3e; surface may be formed on a substrate and a Group III-V material may be grown from the &#x3c;111&#x3e; surface to form a Group III-V device structure in a trench isolated between a dielectric layer. A final critical dimension of the device structure may be trimmed to achieve a suitably sized node structure.

Structure and method of forming metamorphic heteroepi materials and III-V channel structures on si

A plasma etch process for successively different layers, including an anti-reflection coating (ARC), an amorphous carbon layer (ACL) and a dielectric layer, with successively different etch chemistries is performed in a single plasma reactor chamber. A first transition step is performed after etching the ARC by replacing the fluorine-containing process gas used in the ARC etch step with an inert species process gas. A flush step is performed after etching the ACL by replacing the hydrogen-containing process gas used in the ACL etch step with argon gas.

Dielectric plasma etch process with in-situ amorphous carbon mask with improved critical dimension and etch selectivity

In a plasma reactor having an electrostatic chuck, wafer voltage is determined from RF measurements at the bias input using previously determined constants based upon transmission line properties of the bias input, and this wafer voltage is used to accurately control the DC wafer clamping voltage.

Method of feedback control of ESC voltage using wafer voltage measurement at the bias supply output

A plasma reactor has a dual frequency plasma RF bias power supply furnishing RF bias power comprising first and second frequency components, f(), f(), respectively, and an RF power path having an input end coupled to the plasma RF bias power supply and an output end coupled to the wafer support pedestal, and sensor circuits providing measurement signals representing first and second frequency components of a measured voltage and first and second frequency components of a measured current near the input end of the RF power path. The reactor further includes a processor for providing first and second frequency components of a wafer voltage signal as, respectively, a first sum of the first frequency components of the measured voltage and measured current multiplied by first and second coefficients respectively, and a second sum of the second frequency components of the measured voltage and measured current multiplied by third and fourth coefficients, respectively. A processor produces a D.C. wafer voltage by combining D.C. components of the first and second frequency components of the wafer voltage with an intermodulation correction factor that is the product of the D.C. components of the first and second components of the wafer voltage raised to a selected power and multiplied by a selected coefficient.

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Saratoga, CA, United States of America

Wonseok Lee