Ramtron International Corporation

Ramtron Corporation

William L Larson

Thomas E Davenport

Paul J Schuele

Constance DeSmith

A ferroelectric memory cell has an FET covered by an insulation layer and a ferroelectric capacitor located thereover. An interconnect couples an upper plate of the ferroelectric capacitor to a source/drain of the transistor. In a method of forming the cells, after the transistor is fabricated, the bottom electrode and ferroelectric dielectric are established, but the top capacitor electrode is not added until a further layer of insulation is added over the ferroelectric and windows are opened in it. One window is for the top electrode and another window is to one source/drain region of the FET.

Method for making a ferroelectric memory cell with a ferroelectric

Stacked ferroelectric memory cell

A non-volatile ferroelectric memory having folded bit lines both reduces the size of the memory while also eliminating noise interference commonly associated with non-volatile ferroelectric memories having an open bit line architecture. The memory provides two pairs of coincident word and plate lines associated with each row, viz., plate line A paired with word line B, and plate line B paired with word line A. The plate line of a pair may overlie or underlie the word line of the pair, and one may have the same width or a different width as the other of the pair, but preferably the elements of the pair are generally aligned, and the elements of the other pair are aligned with themselves, the two pairs being distally spaced apart. Each cell in the row is connected at the appropriate location to a word line of one of the pairs and a plate line of the other pair. Therefore, the word line and plate line of any single cell are not coincident. Further, adjacent cells in any row do not share the same word line or plate line, but are connected to the other word line or plate line.

Non-volatile ferroelectric memory with folded bit lines and method of

A ferroelectric capacitor for use in integrated circuits and having an asymmetric operation. The capacitor has a bottom electrode, a layer of ferroelectric material over the bottom electrode, a dielectric spacer on the sides of the bottom electrode and ferroelectric material, and a top electrode over the layer of ferroelectric material. The bottom and top electrode are comprised of different materials. Alternatively, an ion implantation region is formed in the top surface of the layer of ferroeletric material. A method of forming the asymmetric ferroelectric capacitor is also disclosed.

Structure and method for increasing the dielectric constant of

A ferroelectric capacitor for a memory device including a substrate, a bottom electrode and a top electrode. Between the bottom and top electrodes is either an alternating plurality of layers of ferroelectric material and intermediate electrodes or a plurality of layers of ferroelectric material. A method for forming the same through establishing one layer over the other is also disclosed.

Series ferroelectric capacitor structure for monolithic integrated

Disclosed is a multilayer capacitor structure in an integrated circuit, including a first electrode constructed by forming at least one layer over a substrate and forming a plate layer over the previous layer(s). A dielectric layer is formed over this first electrode, and a second electrode is established over the dielectric layer by forming a plate layer over the dielectric layer, and forming at least one additional layer over the plate layer. Each layer may serve one or more functions. Also disclosed is a further embodiment including constructing a first electrode by forming at least one layer on a substrate, forming a plate layer over the previous layer(s), and forming a dielectric layer over the first electrode. The resulting structure is then heated, preferably in an oxygen ambient, to oxidize the lower layer. A second electrode can then be formed over the dielectric layer.

Growing community of inventors

Colorado Springs, CO, United States of America

William L Larson