Freescale Semiconductor,inc.

Motorola Corporation

William H Lytle

Craig S Amrine

Owen R Fay

Scott M Hayes

George R Leal

Jong-Kai Lin

Ravinder K Sharma

Jianwen Xu

Timothy B Dean

Ravichandran Subrahmanyan

Steven Markgraf

Bennett L Hileman

Zhiwei Gong

Gregory Joseph Dunn

Jinbang Tang

Marc Alan Mangrum

Kenneth R Burch

Henry G Hughes

Treliant Fang

Darrel R Frear

Tien-Yu Tom Lee

William M Beckenbaugh

Wei Gao

Remy J Chelini

Dennis R Olsen

Lih-Tyng Hwang

Barry C Johnson

Lizabeth Ann Keser

Thomas A Scharr

Terance B Blake

Naresh C Saha

Russell Thomas Lee

Jay J Liu

Kevin H Chang

Peter C East

George A Strumberger

Bernard Berman

Ananda P De Silva

Stephen B Springer

Angela Rogona

Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.

Method for singulating electronic components from a substrate

An electronic panel assembly (EPA) includes one or more electronic devices with primary faces having electrical contacts, opposed rear faces and edges therebetween. The devices are mounted primary faces down in openings in a warp control sheet (WCS). Cured plastic encapsulation is formed at least between lateral edges of the devices and WCS openings. Undesirable panel warping during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. Thin film insulators and conductors couple electrical contacts on various devices to each other and to external terminals, thereby forming an integrated multi-device EPA.

Warp compensated electronic assemblies

Methods and apparatus are provided for an electronic panel assembly (EPA) (), comprising: providing one or more electronic devices () with primary faces () having electrical contacts (), opposed rear faces () and edges () therebetween. The devices () are mounted primary faces () down on a temporary support () in openings () in a warp control sheet (WCS) () attached to the support (). Plastic encapsulation () is formed at least between lateral edges () of the devices () and WCS openings (). Undesirable panel warping () during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. After encapsulation cure, the EPA () containing the devices () and the WCS () is separated from the temporary support () and, optionally, mounted on another carrier () with electrical contacts () exposed. Thin film insulators () and conductors () are desirably applied to couple electrical contacts () on various devices () to each other and to external terminals (), thereby forming an integrated multi-device EPA ().

Warp compensated package and method

A method of forming a semiconductor package includes providing a carrier, attaching a first surface of a first device on the carrier, wherein the first surface comprises a first active surface of the first device, and attaching a second surface of a second device on the carrier. In one embodiment, the second surface is opposite a third surface of the second semiconductor die and the third surface comprises a second active surface. A first insulating material can be formed between the first device and the second device.

Method of forming a semiconductor package including two devices

Methods for forming a microelectronic assembly () are provided. In one embodiment, the method includes providing a device substrate () having a plurality of electronic components () coupled thereto, and providing a carrier substrate () having first and second opposing surfaces () and including a plurality of openings () extending between the first and second opposing surfaces () and a plurality of depressions () formed on the first opposing surface (). The method further includes attaching the device substrate () to the first opposing surface () of the carrier substrate () using an adhesive material () such that at least some of the adhesive material () is adjacent to at least some of the plurality of depressions (), and removing the device substrate () from the carrier substrate ().

Method for releasing a microelectronic assembly from a carrier substrate

An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer.

Flexible carrier for high volume electronic package fabrication

A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.

Method for forming a packaged semiconductor device

A method of forming a semiconductor package includes forming a coating over a first device, attaching the first device to a substrate using an adhesive, encapsulating the first device using an encapsulant material, releasing the first device from the substrate using the adhesive, removing a portion of the encapsulant material that is over the first device to expose the coating, and removing the coating over the first device to expose a portion of the first device.

Method of forming a package with exposed component surfaces

A method is described for manufacturing electronic assemblies (). Electronic die () held in a plastic matrix () form a partially completed panel () of electronic assemblies (). The panel () is adhesively mounted to a ceramic carrier () having multiple holes () there through. Conductive interconnects (--etc.) and other layers are applied to the panel, coupled to electrical contacts on the die () and external electrical contacts (-) for the panel (). The panel () and the carrier () are separated and the panel singulated to release the finished electronic assemblies (). Silicone is a preferred adhesive () and is dissolved using a non-polar solvent () that penetrates through the holes () in the carrier () to the adhesive (). The adhesive () is preferentially applied using a transfer adhesive sandwich (), that is, an adhesive layer () with removable plastic sheets () on either side that can be peeled away from the adhesive (). This facilitates handling and properly locating the adhesive () on the carrier () for efficient low cost manufacture of the assemblies ().

Electronic assembly manufacturing method

Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.

Integrated circuit package formation

A structure () for holding an integrated circuit die () during packaging includes a support substrate (), a release film () attached to the substrate (), and a swelling agent (). A method () of packaging the die () includes placing the die () on the substrate () with its active surface () and bond pads () in contact with the film (). The agent () is applied over an adhesive coating () of the film (). The agent () causes the adhesive () to swell into contact with the bond pads () and/or to form fillets () of adhesive () about the die (). The die () is encapsulated in a molding material () and released from the substrate () as a panel () of dies (). Swelling of the adhesive () about the bond pads () prevents the molding material () from bleeding onto the bond pads ().

Method of packaging an integrated circuit die

Methods and apparatus are provided for use in manufacturing a device packaging comprising the steps of: positioning a metal substrate such as spring steel on a magnetic plate so as to expose a surface of the metal substrate; placing a first tape layer on the exposed surface of a metal substrate so as to expose a nonstick surface of the first tape layer such as PTFE; placing a second tape layer on the exposed surface of the first tape layer so as to expose a surface of the second tape layer; positioning a mold frame on the exposed surface of the second tape layer; positioning a die within the mold frame; depositing epoxy within the mold frame; curing the epoxy so as to create a molded panel; removing the mold frame; grinding the molded panel to a desired thickness; separating the first tape layer from the second tape layer so as to separate the metal substrate from the molded panel; and peeling the second tape layer from the molded panel. The process provides an efficient method for creating a chips first package.

Flexible carrier and release method for high volume electronic package fabrication

The invention provides an integrated device with corrosion-resistant capped copper bond pads. The capped copper bond pads include at least one copper bond pad on a semiconductor substrate. An activation layer comprising one of immersion palladium, electroless cobalt, or immersion ruthernium is disposed on the copper bond pad. A first intermediate layer of electroless nickel-boron alloy is disposed on the activation layer. A second intermediate layer comprising one of electroless nickel or electroless palladium is disposed on the first intermediate layer, and an immersion gold layer is disposed on the second intermediate layer. A capped copper bond pad and a method of forming the capped copper bond pads are also disclosed.

Corrosion-resistant copper bond pad and integrated device

The invention provides a method of plating an integrated circuit. An activation plate is positioned adjacent to at least one integrated circuit. The integrated circuit includes a plurality of bond pads comprising a bond-pad metal, and the activation plate also comprises the bond-pad metal. A layer of electroless nickel is plated on the bond pads and the activation plate, and a layer of gold is plated over the layer of electroless nickel on the bond pads and the activation plate. An integrated circuit with bond pads plated using the activation plate, and a system for plating an integrated circuit is also disclosed.

Activation plate for electroless and immersion plating of integrated circuits

An exemplary method and apparatus for MEMS device wafer level and/or array packaging comprises inter alia an EM shielding array of dielectric lid elements () sealed to a MEMS device die array () to produce a sealed MEMS device package array (). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve hermetic sealing and/or EM shielding for any MEMS device. An exemplary embodiment of the present invention representatively provides for wafer level packaging of RF MEMS switches prior to device singulation.

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Chandler, AZ, United States of America

William H Lytle