Intel Corporation

William Glennan

Reed D Vilhauer

Naoki Matsumura

Florence R Pon

Hyoung Il Kim

Andrew Warrack Morning-Smith

Tyler Leuten

Yuhong Cai

Brian C Fritz

Brian R Mcfarlane

Gang Ji

Yi Xu

Emily P Chung

Allen Huang

Hung T Tran

James Zhang

Ramakrishna Ram Pallala

Frank D Madrigal

Embodiments described herein provide a semiconductor package comprising multiple dies encapsulated in multiple molding compounds. In one example, a semiconductor package comprises: a first die or die stack on a substrate; a first molding compound encapsulating the first die or die stack on the substrate; a second die or die stack on the first molding compound; and a second molding compound encapsulating the second die or die stack and at least one portion of the first molding compound. In this example, the first die or die stack is electrically coupled to the substrate using a first wire bond and the second die or die stack is electrically coupled to the substrate using a second wire bond. Additionally, the first molding compound encapsulates the first wire bond and the second molding compound encapsulates the second wire bond. Furthermore, a footprint of the second die overlaps a footprint of the first die.

Die over mold stacked semiconductor package

An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.

SSD restart based on off-time tracker

Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo.

Staged power distribution control

In embodiments, an apparatus may include a battery life monitor. The battery life monitor may, in some embodiments, receive a battery level indicator indicative of a current charge level of a battery that is coupled with the apparatus and a first temperature that may indicate a temperature of a current location of the apparatus. The battery life monitor may also receive one or more additional temperatures that indicate respective temperatures of one or more locations in which the apparatus is likely to be operated prior to discharge of the current charge level of the battery. Based at least in part on the current charge level, the first temperature indicator, and the one or more additional temperatures, the battery life monitor may calculate one or more battery life estimates that correspond with the one or more locations. Other embodiments may be described and/or claimed.

Battery life estimation based on multiple locations

Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having one or more wires that extend beyond a topmost component in the IC package assembly, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a substrate having a first side and a second side opposite the first side, an IC die having a first side and a second side opposite the first side, where the first side of the IC die faces the first side of the substrate, a wire electrically coupled with the IC die, where an end of the wire extends beyond a topmost component in the IC package assembly, and an overmold coupled with the topmost component. Other embodiments may be described and/or claimed.

Integrated circuit package assembly with wire end above a topmost component

Growing community of inventors

Folsom, CA, United States of America

William Glennan