Tandem Computers Incorporated

Other

William Edward Baker

David P Sonnier

William P Bunton

William J Watson

David J Garcia

Daniel L Fowler

Robert W Horst

John C Krause

Geoffrey I Iswandhi

Frank A Williams

Richard W Cutts, Jr

Linda Ellen Zalzala

Paul N Hintikka

John D Coddington

William F Bruckert

Susan S Meredith

Stephen G Low

Curtis Willard Jones, Jr

Gary F Campbell

John Michael Brown

Douglas E Jewett

Steven C Meyers

Patricia L Whiteside

Randall G Banton

James Stevens Klecka

Patracia L Whiteside

David Joseph Kinkade

Stephen H Miller

Kenneth H Porter

Barry Lee Drexler

Harry Frank Elrod

Michael P Simpson

A fuel additive bottle has a neck and thread pattern that allows insertion into a capless diesel fuel system so the bottle's contents can be poured by gravity into a fuel tank. The neck of the bottle is elongated and has a diameter of approximately 0.932 inches, and the novel thread pattern includes thread interruptions that form two or four threadless paths. In use, the spring loaded tabs of a capless fuel system are depressed by the threadless path portion of bottle, thereby triggering the self-sealing mechanism to open, so the fluid receiving aperture is exposed. The use of the threadless paths facilitates the safe and easy entry and removal of the bottle from the capless fuel system.

Fuel additive bottle for use with capless diesel fuel system

A fuel additive bottle has a neck and thread pattern that allows insertion into a capless fuel system so the bottle's contents can be poured by gravity into a fuel tank. The neck of the bottle is elongated and has a diameter of approximately 0.854&#x2033;, and the novel thread pattern includes thread interruptions that form at least one threadless path. In use, the spring loaded tabs of a capless fuel system are depressed by the threadless path portion of bottle, thereby triggering the self-sealing mechanism to open, so the fluid receiving aperture is exposed. The use of the threadless paths facilitates the safe and easy entry and removal of the bottle from the capless fuel system.

Fuel additive bottle for use with capless fuel system

Devices that assist in transferring liquid from commercially available fuel additive containers into capless fuel system intakes generally include an enlarged mouth portion and a narrower nozzle portion, with the mouth portion detachably engaging with an additive container, and the nozzle portion inserted into a capless fuel system intake, such that the capless fuel system's opening flap is held in the opened position. The mouth of the device includes a plurality of hinge points that permit circumferential enlargement of the aperture, thereby allowing the device to form a substantially leak-proof frictional engagement with the neck of fuel additive containers having different diameters. In this manner devices can be used with almost all additive containers, regardless of the type, size and/or manufacturer. The device may include at least one flexible region on the nozzle.

Circumferentially adjustable device for transferring fuel additives from containers into capless fuel systems

Devices that assist in transferring liquid from commercially available fuel additive containers into capless fuel system intakes generally include an enlarged mouth portion and a narrower nozzle portion, with the mouth portion detachably engaging with an additive container, and the nozzle portion inserted into a capless fuel system intake, such that the capless fuel system's opening flap is held in the opened position. The mouth of the device includes a plurality of hinge points that permit circumferential enlargement of the aperture, thereby allowing the device to form a substantially leak-proof frictional engagement with the neck of fuel additive containers having different diameters. In this manner devices can be used with almost all additive containers, regardless of the type, size and/or manufacturer.

A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.

Method of data communication flow control in a data processing system

A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identifying the source and destination of the message, and may also contain requests to write to, or read from, storage of a CPU. Protection against errant reads or writes is provided by an access validation method that utilizes access validation information contained in plural entries maintained by each CPU. Each entry provides validation by identifying what elements of the system has read and/or write wccss to the memory of that CPU, without which memory access is denied.

Storage access validation to data messages using partial storage address

Apparatus for detecting divergence between a pair of duplexed,

A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. The CPUs are structured to operate in one of two modes: a simplex mode in which the two CPUs operate independently of each other, and a duplex mode in which the CPUs operate in lock-step synchronism to execute each instruction of identical instruction streams at substantially the same time. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.

Fail-fast, fail-functional, fault-tolerant multiprocessor system

Method of synchronizing a pair of central processor units for duplex,

The present invention provides a mechanism for initial execution of software code by a processor in a multiprocessor system. In the preferred embodiment, the multiprocessor system has registers implemented at a reset vector location in a processor. The registers are first loaded with a sequence of software code, and then a first instruction loop is implemented with that software code. The processor is then released from a reset state, and the first instruction loop is executed. This first instruction loop is capable of being executed for an indefinite length of time, and it can execute software instructions on a periodic basis. The first instruction loop is then modified into a second instruction loop. The first and second instruction loops have at least one different instruction. The processor within the system of multiple processors is thus initialized.

Spoon-feed initialization in a multiprocessor system

A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets, and stored at an interrupt queue in memory. Storage of the interrupt data will initiate an internal interrupt to notify the receiving CPU. The receiving CPU can then access the interrupt queue, examine the interrupt data, and determine what action to take.

Interrupt message delivery identified by storage location of received

A processing system includes a number of communicatively interconnected system elements structured to send and receive data in the form of message packets. Message packets sent to a destination with expectation of response are timed, and if no response is received within an allotted time, a barrier transaction message packet is sent to the destination. The destination is required to provide a barrier transaction response to the barrier transaction packet only after it has responded to, or discarded, all prior received message packets requiring response by the destination. When the source of the barrier transaction message packet receives the barrier transaction response it can be assured that the communication path to the destination is in order, and no prior (late) responses will be forthcoming.

Method for verifying responses to messages using a barrier message

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Austin, TX, United States of America

William Edward Baker