Taiwan Semiconductor Manufacturing Comp. Ltd.

National Cheng-kung University

Yageo Corporation

Industrial Technology Research Institute

Koninklijke Philips Corporation N.v.

U.S. Philips Corporation

Wen-Hsi Lee

Ling-Sung Wang

Yu-Jen Chen

I-Shan Huang

Chan-yu Hung

Kei-Wei Chen

Ying-Lang Wang

Che-Yi Su

Chi-Cheng Hung

Yu-Sheng Wang

Jung-Chih Tsao

Te-Ming Kung

Shu Wei Chang

Cheng-Chung Lee

Tarng-Shiang Hu

Detlev F Hennings

Herbert J Schreinemacher

Wei-Chin Huang

Chih-Hsien Wu

Tseung-Yuen Tseng

Ching-Chih Lin

Chuan-Sheng Chuang

Wei-Ling Lin

Chun-Te Lee

Kai-Jyun Jhong

Jiing-Fa Wen

Jiun-Jie Wang

Yi-Feng Yang

Yi-Jung Ling

Zhien C Chen

Ying-lang Wang

A semiconductor structure includes a substrate, a nanowire disposed over the substrate, a metal gate electrode layer and a gate dielectric layer. A dielectric layer is formed on the substrate. The nanowire has a first portion and a second portion. The nanowire has a first portion and a second portion, the first portion of the nanowire comprises a first semiconductor layer and a second semiconductor layer surrounded by the first semiconductor layer, the second portion comprises the second semiconductor layer. The metal gate electrode layer surrounds the first portion of the nanowire. The gate dielectric layer is disposed between the metal gate electrode layer and the nanowire.

Semiconductor structure

A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction substantially perpendicular to the first direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and each of the gate structures extending at least unilaterally substantially beyond a first side of the corresponding first or second active region that is proximal to the gap or a second side of the corresponding first or second active region that is distal to the gap; and some but not all of the gate structures also extending bilaterally substantially beyond each of the first and second sides of the corresponding first or second active region.

Semiconductor device including unilaterally extending gates and method of forming same

A method of forming a semiconductor structure includes following operations. A substrate including a silicon (Si) layer is received. An amorphous germanium (Ge) layer is formed on the Si layer. A barrier layer is formed over the amorphous Ge layer. The substrate is annealed to transform the Si layer and the Ge layer to form a single crystalline SiGe layer. A Ge concentration is in a positive correlation with a ratio of a thickness of the Ge layer and a thickness of the Si layer.

Semiconductor structure and method of forming the same

A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and for each active region, a portion of each of some but not all of the gate structures (gate extension) extending partially into the gap; and when viewing the gate structures as a group, the group having a notched profile relative to the second direction, where notches in the notched profile correspond to ones of the gate structures which are substantially free of extending into the gap.

Semiconductor device including trimmed-gates and method of forming same

A method is provided for fabricating a terminal electrode. The terminal electrode is applied on a multilayer ceramic capacitor (MLCC). The method prints inner electrodes on full area together with protective layers. The MLCC uses the thickness of thinned dielectric ceramic layers and the stacking of nickel inner-electrode layers. High capacitance is achieved at ends and sides with high electrode-to-ceramic ratios. Thus, the present invention uses a coating technology of ultra-low-temperature electrochemical deposition to fabricate low internal-stress MLCC terminal electrodes together with insulating protective layers for improving MLCC yield while cost reduced.

Method for fabricating terminal electrode of multilayer ceramic capacitor having inner electrodes printed on full area together with protective layers

A method (of manufacturing a semiconductor device) includes: forming active regions including spacing apart neighboring active regions resulting in corresponding gaps; forming gate structures (overlying the active regions and the gaps) including locating intra-gap segments of the gate structures over the gaps, arranging each intra-gap segment to include two end regions separated by a central region, and at intersections between active regions and gate structures that is designated to be non-functional (flyover intersection), preventing formation of a functional connection between the two; and removing selected portions of at least some of the intra-gap segments including removing central regions of first selected intra-gap segments substantially without removing portions of corresponding end regions of the first selected intra-gap segments, and removing central regions and portions of end regions of second selected intra-gap segments for which corresponding end regions of the second intra-gap segments abut flyover intersections thereby trimming corresponding gate structures.

Method of forming semiconductor device including trimmed-gates

A semiconductor device includes: active regions arranged in a first grid oriented substantially parallel to a first direction; and gate electrodes arranged spaced apart in a second grid and overlying corresponding ones of the active regions, the second grid being oriented substantially parallel to a second direction, the second direction being substantially orthogonal to the first direction. The first gaps are interspersed correspondingly between neighboring ones of the active regions. For a flyover intersection at which a corresponding gate electrode crosses over a corresponding active region and for which the gate electrode is not functionally connected to the corresponding active region, the gate electrode does not extend substantially beyond the corresponding active region and so does not extend substantially into a corresponding one of the first gaps.

Semiconductor device including trimmed-gates

A method includes method includes forming a dummy gate stack over a semiconductor substrate, wherein the semiconductor substrate is comprised in a wafer, removing the dummy gate stack to form a recess, forming a gate dielectric layer in the recess, and forming a metal layer in the recess and over the gate dielectric layer. The metal layer has an n-work function. A block layer is deposited over the metal layer using Atomic Layer Deposition (ALD). The remaining portion of the recess is filled with metallic materials, wherein the metallic materials are overlying the metal layer.

Block layer in the metal gate of MOS devices

A semiconductor device includes: active regions arranged in a first grid oriented parallel to a first direction; and gate electrodes arranged spaced apart in a second grid and overlying corresponding ones of the active regions, the second grid being oriented parallel to a second direction, the second direction being orthogonal to the first direction. The first gaps are interspersed between neighboring ones of the active regions. For a flyover intersection at which a corresponding gate electrode crosses over a corresponding active region and for which the gate electrode is not functionally connected to the corresponding active region, the gate electrode does not extend substantially beyond the corresponding active region and so does not extend substantially into the corresponding gap.

Semiconductor device including trimmed-gates and method for generating layout of same

Two methods are provided to make aluminum terminal electrodes for chip resistors. For a chip resistor having a high resistance, the structure is not changed but the aluminum terminal electrode must have a high solid content, including a high aluminum content and a high glass content. For porous-aluminum terminal electrodes applied to a chip resistor having a low resistance, a new structure is formed to change current-conducting paths through different sizes of a protecting layer and a resistor layer. Therein, original paths conducting to the resistor layer through front terminal electrodes are changed into new paths conducting to the resistor layer through side terminal electrodes.

Methods of fabricating chip resistors using aluminum terminal electrodes

A fabrication method of magnetic device is provided. A magnetic material is provided. A portion of the magnetic material is selectively irradiated by an energy beam, and reactive gas is introduced simultaneously. The magnetic material being irradiated is melted and solidified to form a solidified layer. An outer layer of the solidified layer reacts with the reactive gas to form a barrier layer, so as to form a magnetic unit including the solidified layer and the barrier layer. It is determined whether the manufacturing process of the same layer is finished, if not, the energy beam is moved to the other portion of the magnetic material. The above step is repeated to overlap multiple magnetic units to form a magnetic layer. If yes, the flow returns to the 1step to provide another magnetic material to the magnetic layer. The above steps are repeated to form a 3D magnetic device.

Fabrication method of magnetic device

The present invention provides an aluminum (Al) paste. The Al paste has low cost and high conductivity. An Al powder having a wide range of particle size distribution and an increased solid content are used to solve the problem of multiple pores. A rupture mechanism of alumina is fully used for sintering to improve contacting internal liquid Al with each other for forming conductive paths. With coordination of sufficient liquid glass powder, all ruptured surface of the Al powder is coated to inhibit exposed liquid Al from oxidation on contacting air. The problem of low conductivity of Al paste is thus radically solved.

Method of fabricating high-conductivity thick-film aluminum paste

A low-ohmic chip resistor with high conductivity is fabricated. The chip resistor has an electrode of a base metal or base-metal alloy. The base-metal or base-metal-alloy electrode and a resistor layer are fabricated through thick-film printing with sintering at a low temperature in the air. Therein, a thick-film paste made of a cheap low-reduction-potential metal (such as aluminum (Al) or nickel (Ni)) is formed through screen-printing and sintering. Then, the layer of the cheap low-reduction-potential metal is used as a sacrificial layer to be immersed in a metal solution having a high reduction potential. Therein, a wet chemical alternation reaction is processed for obtaining a metal electrode having the high reduction potential. Or, the sacrificial layer may be immersed in a mixed solution of several different metal having high reduction potential to process wet chemical alternation reaction for obtaining an alloy of metal mixed with different composition.

Method of fabricating highly conductive low-ohmic chip resistor having electrodes of base metal or base-metal alloy

A chip resistor having terminal electrodes is provided. In the chip resistor, a first protector layer has a size different from that of a first resistor layer. Thus, two ends of the first resistor layer are exposed to form new current conduction path. Original current conduction path having the same size of the protective layer and the resistor layer is thus replaced. Hence, resistance variation of the chip resistor is solved; yield of the chip resistor is increased; and, the material cost of the front terminal electrode is greatly reduced.

Growing community of inventors

Kaohsiung, Taiwan

Wen-Hsi Lee