United Microelectronics Corp.

United Semiconductor Corp.

Weiching Horng

Gary Y Hong

Joe Ko

Kan-Yuan Lee

A method of stabilizing an anti-reflection coating (ARC) layer is disclosed. The method provides a substrate with a dielectric layer, a conductive layer, and the ARC layer formed thereon. The ARC layer is treated in an alloy treatment step prior to forming a photoresist layer over the ARC layer, so that the specificity of the ARC layer is stabilized to allow accurate transfer of a desired pattern. A photomask with the desired pattern is provided, while a photolithographic process is then performed to transfer the pattern onto the wafer.

Method of stabilizing anti-reflection coating layer

A method of stabilizing an anti-reflection coating (ARC) layer is disclosed. The method provides a substrate with a dielectric layer, a conductive layer, and the ARC layer formed thereon. The ARC layer is treated in an ultraviolet (UV) curing step prior to forming a photoresist layer over the ARC layer, so that the specificity of the ARC layer is stabilized to allow an accurate pattern is replicated in the photoresist layer. A photomask with the desired pattern is provided, while a photolithographic process is then performed to transfer the pattern onto the wafer.

A flash memory structure is formed by a method comprising the steps of providing a semiconductor substrate, and then forming a shallow first trench within the substrate. Thereafter, a buried doped region is formed underneath the first trench so that the buried doped region is at a distance from the substrate surface. The buried doped region is one major aspect in this invention that can be applied to the processing of shallow trench isolation and is capable of reducing device area. Next, a deeper second trench is etched in the substrate. The second trench has a greater depth than the depth of the first trench. Subsequently, insulating material is deposited into the first and the second trench, and then a stacked gate structure is formed above the substrate. Later, the surface source region and drain region are formed on two sides of the stacked gate structure. Through thermal operation, the surface source region alternately connects with the buried doped region to form a buried common source region.

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Tai-Chung, Taiwan

Weiching Horng