Applied Materials, Inc.

Elevated Materials US LLC

Wei-Sheng Lei

Ajay Kumar

Brad Eaton

Madhava Rao Yalamanchili

James S Papanu

Saravjeet Singh

Jungrae Park

James Matthew Holden

Prabhat Kumar

Todd J Egan

Aparna Iyer

Steven Verhaverbeke

Kurtis Leschkies

Han-Wen Chen

Giback Park

Mohammad Kamruzzaman Chowdhury

Jeffrey L Franklin

Visweswaren Sivaramakrishnan

Kyuil Cho

Roman Gouk

Mahendran Chidambaram

Alexander N Lerner

Jean Delmas

Ludovic Godet

Banqiu Wu

Seshadri Ramaswami

Subramanya P Herle

Antoine P Manens

David Masayuki Ishikawa

Tong Liu

Wenguang Li

Kangkang Wang

Martin S Wohlert

Tapash Chakraborty

Ezhiylmurugan Rangasamy

Karthik Balakrishnan

Jivko Dinev

Kashif Maqsood

Zavier Zai Yeong Tan

John Rusconi

Apama Iyer

Girishkumar Gopalakrishnannair

Alejandro Sevilla

Shmuel Erez

The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

High connectivity device stacking

Exemplary processing methods may include translating a lithium film beneath a first showerhead. The methods may include introducing an oxidizer gas through the first showerhead onto the lithium film. The methods may include forming an oxide monolayer on the lithium film. The oxide monolayer may be or include the oxidizer gas adsorbed on the lithium film. The methods may include translating the lithium film beneath a second showerhead after forming the oxide monolayer. The methods may include introducing a carbon source gas through the first showerhead onto the lithium film. The methods may also include converting the oxide monolayer into a carbonate passivation layer through reaction of the oxide monolayer with the carbon source gas.

Lithium metal surface modification using carbonate passivation

In an embodiment, a method of forming a blind via in a substrate comprising a mask layer, a conductive layer, and a dielectric layer is provided. The method includes detecting the mask layer by a sensor, the mask layer providing a substrate surface; determining a property of the blind via, the property comprising one or more of a top diameter, a bottom diameter, a volume, or a taper angle; focusing a Gaussian laser beam, under laser process parameters, at the substrate surface to remove at least a portion of the mask layer; adjusting the laser process parameters based on the property; and focusing the laser beam, under the adjusted laser process parameters, to remove at least a portion of the dielectric layer within the volume to form the blind via. The mask layer can be pre-etched. Apparatus for forming a blind via in a substrate are also provided.

Method and apparatus for laser drilling blind vias

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.

Wafer dicing using femtosecond-based laser and plasma etch

A method and apparatus for substrate dicing are described. The method includes utilizing a laser to dice a substrate along a dicing path to form a perforated line around each device within the substrate. The dicing path is created by exposing the substrate to bursts of laser pulses at different locations around each device. The laser pulses are delivered to the substrate and may have a pulse repetition frequency of greater than about 25 MHz, a pulse width of less than about 15 picoseconds, and a laser wavelength of about 1.0 μm to about 5 μm.

Laser dicing glass wafers using advanced laser sources

A process of producing optical devices is provided including transferring a first substrate comprising one or more devices to a laser dicing tool, the laser dicing tool including a filamentation stage and a singulation stage. One or more device contours are created on the first substrate in the filamentation stage. The optical devices are singulated from the first substrate along the one or more device contours in the singulation stage. The devices are transferred to storage or for further backend processing.

Laser dicing system for filamenting and singulating optical devices

An embodiment disclosed herein includes a method of dicing a wafer comprising a plurality of integrated circuits. In an embodiment, the method comprises forming a mask above the semiconductor wafer, and patterning the mask and the semiconductor wafer with a first laser process. The method may further comprise patterning the mask and the semiconductor wafer with a second laser process, where the second laser process is different than the first laser process. In an embodiment, the method may further comprise etching the semiconductor wafer with a plasma etching process to singulate the integrated circuits.

Laser scribing trench opening control in wafer dicing using hybrid laser scribing and plasma etch approach

The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor semiconductor devices having high I/O density with improved bandwidth and power.

Methods of micro-via formation for advanced packaging

The present disclosure relates to systems and methods for fabricating semiconductor packages, and more particularly, for forming features in semiconductor packages by laser ablation. In one embodiment, the laser systems and methods described herein can be utilized to pattern a substrate to be utilized as a package frame for a semiconductor package having one or more interconnections formed therethrough and/or one or more semiconductor dies disposed therein. The laser systems described herein can produce tunable laser beams for forming features in a substrate or other package structure. Specifically, frequency, pulse width, pulse shape, and pulse energy of laser beams are tunable based on desired sizes of patterned features and on the material in which the patterned features are formed. The adjustability of the laser beams enables rapid and accurate formation of features in semiconductor substrates and packages with controlled depth and topography.

Laser ablation system for package fabrication

An additive manufacturing apparatus includes a platform, a dispenser configured to deliver a plurality of successive layers of feed material onto the platform, at least one light source configured to generate a first light beam and a second light beam, a polygon mirror scanner, an actuator, and a galvo mirror scanner. The polygon mirror scanner is configured to receive the first light beam and reflect the first light beam towards the platform. Rotation of the first polygon mirror causes the light beam to move in a first direction along a path on a layer of feed material on the platform. The actuator is configured to cause the path to move along a second direction at a non-zero angle relative to the first direction. The galvo mirror scanner system is configured to receive the second light beam and reflect the second light beam toward the platform.

Additive manufacturing with a polygon scanner

A method of fabricating a frame to enclose one or more semiconductor dies includes forming one or more features including one or more cavities and one or more through-vias in a substrate by a first laser ablation process, filling the one or more through-vias with a dielectric material, and forming a via-in-via in the dielectric material filled in each of the one or more through-vias by a second laser ablation process. The one or more cavities is configured to enclose one or more semiconductor dies therein. In the first laser ablation process, frequency, pulse width, and pulse energy of a first pulsed laser beam to irradiate the substrate are tuned based on a depth of the one or more features. In the second laser ablation process, frequency, pulse width, and pulse energy of a second pulsed laser beam to irradiate the dielectric material are tuned based on a depth of the via-in-via.

Laser ablation for package fabrication

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, a breakthrough treatment is performed, the breakthrough treatment comprising a first physical bombardment operation, a second iterative isotropic and directional plasma etch operation, and a third directional breakthrough operation. Subsequent to performing the breakthrough treatment, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate breakthrough treatment

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San Jose, CA, United States of America

Wei-Sheng Lei