Unimicron Technology Corporation

Wei-Ming Cheng

Shu-Sheng Chiang

Tsung-Yuan Chen

Ming-Hao Wu

Yi-Chun Liu

Tzyy-Jang Tseng

Yu-Chen Chuo

Han-Pei Huang

Cheng-Ming Weng

Shao-Wei Lin

Pao-Chin Chen

A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.

Circuit board structure

A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.

Process of an embedded component structure

Circuit board structure and manufacturing method thereof

A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.

An embedded component structure includes a wiring board, a component and an encapsulant. The wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer. The opening penetrates the wiring board and connects the front side and the reverse side of the wiring board. The interconnection layer is located on the front side of the wiring board and extends toward the opening. The component includes an active surface, a back side opposite to the active side, and a working area located on the active surface. The active surface is connected to the interconnection layer of the wiring board. The encapsulant is filled inside the opening and covers the component, which makes the working area of the component exposed. Besides, a method of the embedded component structure is also provided.

Embedded component structure and process thereof

An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.

Embedded chip package structure

A wiring board includes a substrate, a first conductor layer, a second conductor layer, and a through-via conductor. The substrate has a first surface, a second surface, and at least one through-via. The first conductor layer is formed on the first surface, and the second conductor layer is formed on the second surface. The through-via conductor is formed in the through-via for electrically connecting to the first conductor layer and the second conductor layer. The through-via has a first depressed portion exposed in the first surface, a second depressed portion exposed in the second surface, and a tunnel portion between the first depressed portion and the second depressed portion for connecting the first depressed portion and the second depressed portion. The first depressed portion and the second depressed, portion are non-coaxial.

Touch member and method of manufacturing the same

An embedded electronic device package structure includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer and conductive vias. The core layer has cavity, a first surface and a second surface opposite to the first surface. The electronic device is disposed in the cavity. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers one side of the electronic device. The second dielectric layer disposed on the second surface is filled in the cavity, covers another side of the electronic device and connects the first dielectric layer. The first and the second dielectric layers fully cover the electronic device. The conductive vias are disposed around the surrounding of the electronic device and penetrates through the first and the second dielectric layer and the core layer. The conductive vias respectively connects the first and the second dielectric layer.

Embedded electronic device package structure

An embedded-electronic-device package includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer, a shielding-metal layer and conductive vias. The core layer includes a first surface, a second surface opposite to the second surface and a cavity penetrating the core layer. The electronic device is disposed in the cavity including an inner surface. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers part of the electronic device. The second dielectric layer disposed on the second surface is filled in rest of the cavity, covers rest of the electronic device. The first and second dielectric layers cover the electronic device. The shielding-metal layer covers the inner surface. The conductive vias are respectively disposed in the first and second dielectric layers and extended respectively from outer surfaces of the first and second dielectric layers to the shielding-metal layer.

An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Embedded structure

A method for fabricating a wiring structure of a wiring board is provided. First, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, an intaglio pattern exposing the insulation layer is formed on an outer surface of the film. The intaglio pattern is formed by removing a portion of the insulation layer and a portion of the film. Next, an activated layer is formed on the outer surface and in the intaglio pattern. The activated layer completely covers the outer surface and all surfaces of the intaglio pattern. Then, the film and the activated layer on the outer surface are removed, and the activated layer in the intaglio pattern is remained. After the film and the activated layer on the outer surface are removed, a conductive material is formed in the intaglio pattern by chemical deposition method.

Method for fabricating wiring structure of wiring board

A method for manufacturing a wiring structure of a wiring board is provided. In the method, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, a barrier layer completely covering the film is formed. Next, an intaglio pattern partially exposing the insulation layer is formed on an outer surface of the barrier layer. Next, an activated layer is formed on the outer surface and in the intaglio pattern. Then, the activated layer on the outer surface is removed, and the activated layer in the intaglio pattern is remained. After the activated layer on the outer surface is removed, a conductive material is formed in the intaglio pattern by using a chemical deposition method. After forming the conductive material, the barrier layer and the film are removed.

Method for manufacturing wiring structure of wiring board

An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.

Growing community of inventors

Kaohsiung, Taiwan

Wei-Ming Cheng