Taiwan Semiconductor Manufacturing Comp. Ltd.

Industrial Technology Research Institute

Wei-Liang Chen

Yu-Lung Yeh

Yen-Hsiu Chen

Yung-Hsiang Chen

Ching-Hung Huang

Chuang Chihchous

Ting-Ying Wu

Cheng-Hsien Chen

Ying-Tsang Ho

Tsai-Ji Liou

Chihchous Chuang

Lien-Tai Chen

Dah-Ming Lee

Ming-Tao Yeh

Kai-Rhen Shiao

A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.

Method and system for forming metal-insulator-metal capacitors

A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.

Surface damage control in diodes

A semiconductor arrangement includes an isolation structure having a first electrical insulator layer in a trench in a semiconductor substrate and a second electrical insulator layer in the trench and over the first electrical insulator layer.

Semiconductor arrangement comprising isolation structure comprising at least two electrical insulator layers

Semiconductor arrangement including a first electrical insulator layer and a second electrical insulator layer and method of making

Polyurethane elastic products prepared by a two-stage process are disclosed. In the first stage, polyols are reacted with diisocyanates to form prepolymers. The prepolymers are then reacted with diamine chain extenders which contain amide linkages, to form polyurethane elastic products.

Polyurethanes prepared from amide linkages-containing diamine chain

A process for producing high tenacity and high modulus polyethylene fiber gel spinning. Cycloalkane and cycloalkene are selected as solvents for dissolving ultra-high molecular weight polyethylene, and a volatile solvent such as cyclohexanone or a mixture thereof is selected as an extracting solvent. The present process allows the extracted fibers to be stretched directly after the spinning step without requiring an intermediate winding step. The resulting fibers from the present invention have a tenacity greater than 15 g/d, a modulus greater than 350 g/d, an elongation at break less than 10%, and a crystallinity greater than 60%.

Process for producing high tenacity and high modulus polyethylene fibers

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Tainan, Taiwan

Wei-Liang Chen