Amkor Technology, Inc.

Other

Vincent DiCaprio

Il Kwon Shim

Won Sun Shin

Do Sung Chun

Seon Goo Lee

SeonGoo Lee

DoSung Chun

WonSun Shin

Sangho Lee

Thomas P Glenn

Byung Joon Han

Paul Robert Hoffman

Kambhampati Ramakrishna

Tae Hoan Jang

Steven Webster

Lee John Smith

Kenneth Kaskoun

David Albert Zoba

Chang Kyu Park

Sang Ho Lee

Robert Francis Darveaux

Sean Timothy Crowley

Markus K Liebhard

Frank Joseph Juskey

Stephen Gregory Shermer

Anthony LoBianco

Ju-Hoon Yoon

Dae-Byung Kang

Soon Goo Lee

In-Bae Park

TaeHoan Jang

Frederick J G Hamilton

J Mark Bird

Bruce M Guenin

A semiconductor package for a semiconductor chip, e.g., a memory chip, is disclosed. The semiconductor package includes a substrate having a generally rectangular perimeter with four sidewalls and a chamfer between adjacent first and second ones of the sidewalls. The memory chip is electrically coupled contacts provided on an opposite surface of the substrate. The contacts are in a row along only the one sidewall of the substrate. A body of a plastic encapsulant covers the first surface of the substrate, the memory chip, and at least two of the sidewalls of the package. The entire perimeter of the substrate, including all four sidewalls and the chamfer, are covered by the plastic encapsulant. Alternatively, only two or three of the sidewalls are covered by the plastic encapsulant, with the other sidewall(s) being exposed and vertically coplanar with a respective sidewall of the plastic encapsulant.

Semiconductor memory card

Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed. An embodiment of a semiconductor package includes a semiconductor chip having a first major surface and a second major surface, the semiconductor chip being provided at the second major surface with a plurality of input/output pads; a circuit board including a resin substrate having a first major surface and a second major surface, a first circuit pattern formed at the first major surface and provided with a plurality of ball lands, a second circuit pattern formed at the second major surface and provided with a plurality of bond fingers connected with he ball lands by conductive via holes through the resin substrate, cover coats respectively coating the first and second circuit patterns while allowing the bond fingers and the ball lands to be exposed therethrough, and a central through hole adapted to receive the semiconductor chip therein; electrical conductors that electrically connect the input/output pads of the semiconductor chip with the bond fingers of the circuit board, respectively; a resin encapsulate that covers the semiconductor chip, the electrical conductors, and at least part of the circuit board; and, a plurality of conductive balls fused on the ball lands of the circuit board, respectively.

Semiconductor package and method for fabricating the same

A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin layer is provided with an opening at its center portion. The circuit pattern is formed on at least one of upper and lower surfaces of the resin layer and includes one or more bond fingers and ball lands exposed to the outside. The semiconductor chips have a plurality of input/output pads on an active surface thereof. The semiconductor chips are stacked at a position of the opening of the circuit board, with at least one of the chips being within the opening. Alternatively, both chips are in the opening. The electric connection means connects the input/output pads of the semiconductor chips to the bond fingers of the circuit board. The encapsulant surrounds the semiconductor chips so as to protect the chips from the external environment. The conductive balls are fusion-bonded on the ball lands of the circuit board.

Thin semiconductor package including stacked dies

There is provided a semiconductor package and method for fabricating the same. An embodiment of the semiconductor package includes: a semiconductor chip having a first face and a second face, the first face having a plurality of input/output pads formed thereon; a circuit board composed of a resin film having a first face and a second face, a circuit pattern layer including a plurality of bond fingers and ball lands, and a cover coat covering the circuit pattern layer and selectively exposing the plurality of bond fingers and ball lands, the circuit pattern layer being formed on the first face of the resin film, the circuit board having a through hole at the center thereof, the semiconductor chip being placed in the through hole; electrical connection means for electrically connecting the input/output pads of the semiconductor chip to the bond fingers of the circuit board; an encapsulant for encapsulating the semiconductor chip, connection means and a part of the circuit board; and a plurality of conductive balls fused to the circuit board. Accordingly, the semiconductor package becomes very thin and its heat spreading performance is improved.

A heat slug or spreader is attached directly to a surface of the die in a ball grid array (BGA) package. The heat spreader roughly conforms to the topological profile of the die, underlying substrate, and electrical interconnections between the die and the substrate, such as bond wires. The outer portion of the heat spreader substantially cover the outer portion of the substrate, or alternatively, cover only those portions extending in laterally from the sides of the chip and not the corners. An encapsulant completely covers the heat spreader and die.

Embedded heat spreader ball grid array

A stackable semiconductor package includes a substrate having a first surface, an opposite second surface, and through hole. Circuit patterns on the first and second surfaces of the substrate include lands, and the circuit patterns of the second surface also include bond fingers. A semiconductor chip is in the throughhole. The semiconductor chip has bond pads, which are oriented in a same direction as the second surface of the substrate. Wires electrically connect the bond pads to the bond fingers. An encapsulant fills the through hole and covers the semiconductor chip, the wires and the bond fingers, without covering the lands. Conductive balls are fused to the lands of the first surface of the substrate. A second semiconductor package may be stacked on the second surface of the substrate, and conductive balls of the second semiconductor package may be fused to the lands of the second surface.

Stackable semiconductor package having semiconductor chip within central through hole of substrate

A semiconductor package and method for manufacturing the same is disclosed. The semiconductor package comprises a semiconductor chip, a circuit board, an electrical connection means, an encapsulation material and a plurality of conductive balls. The semiconductor chip has a first surface and a second surface. A plurality of input and output pads are formed on one of the first and second surfaces. The circuit board comprises a thin film having a first surface and a second surface and being provided with a center hole in which the semiconductor chip is positioned, a plurality of circuit patterns being formed on the first surface of the thin film and including a plurality of bond fingers and ball lands, and a cover coat covering the circuit board except for the bond fingers and the ball lands. The electric connection means electrically connects the input and output pads of the semiconductor chip with the bond fingers of the circuit board. The encapsulation material covers the semiconductor, the electric connection means and a portion of the circuit board. The conductive balls are fusion-welded on the ball lands of the circuit board.

Semiconductor package and method for manufacturing the same

Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed. An embodiment of a semiconductor package includes a semiconductor chip having a first major surface and a second major surface, the semiconductor chip being provided at the second major surface with a plurality of input/output pads; a circuit board including a resin substrate having a first major surface and a second major surface, a first circuit pattern formed at the first major surface and provided with a plurality of ball lands, a second circuit pattern formed at the second major surface and provided with a plurality of bond fingers connected with the ball lands by conductive via holes through the resin substrate, cover coats respectively coating the first and second circuit patterns while allowing the bond fingers and the ball lands to be exposed therethrough, and a central through hole adapted to receive the semiconductor chip therein; electrical conductors that electrically connect the input/output pads of the semiconductor chip with the bond fingers of the circuit board, respectively; a resin encapsulate that covers the semiconductor chip, the electrical conductors, and at least part of the circuit board; and, a plurality of conductive balls fused on the ball lands of the circuit board, respectively.

Semiconductor package having semiconductor chip within central aperture of substrate

A multiple chip package and method of making the package allow multiple same size or different size chips to be stacked over each other, thereby creating a thin profile multi-chip package. Chips are attached to one surface of a continuous flexible substrate. The substrate has a metallization layer, which is electrically connected to the chips, such as via bond wires attached to center bond pads of the chips and to bond fingers on the metallization layer. Interconnections, such as solder balls, are attached to the other surface of the substrate and only at the portion opposite to the first chip. The substrate is folded to bring the first chip toward a second chip, which are then attached, such as with an insulative adhesive spacer. If any additional chips remain on the substrate, the substrate is folded to sequentially bring each additional chip toward the surface of the substrate opposite to the preceding chip and is secured thereto.

Multi-stacked memory package

A method for fabricating LGA-, LCCY- and BGA-types of very thin, chip size semi-conductor packages (&ldquo;VCSP's&rdquo;) includes substantially reducing the thickness of a semiconductor wafer containing the semiconductor chips to be packaged by grinding and/or etching the wafer from its back side prior to singulation of the chips from the wafer. The thinned-down chips thus produced are electrically connected to corresponding insulative substrates contained in an integral array thereof using the &ldquo;flip chip&rdquo; interconnection method. The narrow row space between the chips and the substrates are sealed with an underfill material, and the individual, finished VCSP's are then singulated from the array.

Fabricating very thin chip size semiconductor packages

This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant. The layer of adhesive prevents the second die from shorting the wires on the top of the first die, prevents the second die from being fractured during the wire bonding process, and prevents the encapsulant from forming a thermally expansive wedge between the two dies.

Method of making a semiconductor package including stacked semiconductor dies

Alternative methods for making memory cards for computers and such eliminate a need for a separate external housing and a separate chip encapsulation step and enable more memory to be packaged in a same-sized card. One of said methods includes providing a substrate having opposite first and second surfaces with a memory chip mounted on and in electrical connection with a first surface of said substrate. Said second surface of said substrate is temporarily attached to a first surface of a flat carrier sheet, e.g., an adhesive tape. In one embodiment, a mold having a cavity therein is placed on said first surface of said carrier sheet such that said chip and said first surface of said substrate are enclosed in said cavity between said mold and said carrier sheet. A fluid plastic is introduced into said cavity and cured to encapsulate said chip and at least said first surface of said substrate in a protective, monolithic body of hardened plastic. A completed card is then detached from said carrier sheet.

Growing community of inventors

Mesa, AZ, United States of America

Vincent DiCaprio