Industrial Technology Research Institute

Tzu-Ying Kuo

Shu-Ming Chang

Hsiang-Hung Chang

Chia-Wen Chiang

Yuan-Chang Lee

Chun-Te Lin

This invention provides a package structure of three-dimensional stacking dice and its manufacturing method. This invention employs the Through-Silicon-Vias (TSVs) technology to establish vertical electrical connection of the three-dimensional stacking dice and a redistribution layer between a blind hole-on-pad and a vertical through hole formed by the TSVs technology to direct the electrical connection from a first surface to an opposite second surface of this structure. In addition, this invention employs a conductive bump completely covering the pads jointed together between the stacking dice to avoid breakage of the pads. The reliability of the three-dimensional stacking dice of the present invention is increased.

Package structure of three-dimensional stacking dice and method for manufacturing the same

The three-dimensional conducting structure comprises a substrate, a first redistributed conductor, a second redistributed conductor and an insulator. The substrate has an active surface, a passive surface opposite to the active one, a pad on the active surface and a through hole. The first redistributed conductor comprises a projecting portion and a receiving portion. The projecting portion is projected from the active surface and electrically connected to the pad. The receiving portion is outside the active surface and in contact with the projecting portion, both of which constitute a recess communicating with the through hole. The second redistributed conductor is positioned within the through hole and the recess, in contact with the receiving portion, and extended toward the passive surface along the through hole. The insulator is filled between the second redistributed conductor and the substrate and between the second redistributed conductor and the projecting portion.

Three-dimensional conducting structure and method of fabricating the same

This invention provides an image sensor module with a three-dimensional die-stacking structure. By filling a conductive material into through silicon vias within at least one image sensor die, and into via holes within an insulating layer, vertical electrical connections are formed between the image sensor die and an image processor buried in the insulating layer. A plurality of solder bumps is formed on a backside of the image sensor module so that the module can be directly assembled onto a circuit board. The image sensor module of this invention is characterized by a wafer-level packaging architecture and a three-dimensional die-stacking structure, which reduces electrical connection lengths within the module and thus reduces an area and height of the whole packaged module.

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Taipei, Taiwan

Tzu-Ying Kuo