Taiwan Semiconductor Manufacturing Comp. Ltd.

Tung-Ching Tseng

Syun-Ming Jang Jang

Shau-Lin Shue

Hai-Ching Chen

Ming-Han Lee

Hsin-Yen Huang

Hsiang-Huan Lee

Chung-En Kao

Wen-Cheng Yang

Ying-Ho Chen

Keith Kuang-Kuo Koai

Chuan-Ping Hou

Li-Jia Yang

Tsung-Lin Lee

Tsu Shih

Chu-Yun Fu

Chih-Hsiang Yao

Yi-Ming Lin

Sheng-Chun Yang

Chih-Hung Yeh

Sung-Po Yang

Chi-Wei Chung

Feng-Tao Lee

Kuang-Kuo Koai

Shih Fang Chen

Chuang-Ping Hou

Sheng Yung Liu

A chemical vapor deposition (CVD) apparatus is provided. The CVD apparatus includes a CVD chamber including multiple wall portions. A pedestal is disposed inside the CVD chamber, configured to support a substrate. A gas inlet port is disposed on one of the wall portions and below a substrate support portion of the pedestal. In addition, a gas flow guiding member is disposed inside the CVD chamber, coupled to the gas inlet port, and configured to dispense cleaning gases from the gas inlet port into the CVD chamber.

Chemical vapor deposition apparatus with cleaning gas flow guiding member

An apparatus for wafer processing includes a wafer pedestal configured to support a wafer, a radiation source configured to provide an electromagnetic radiation to the wafer, and a transparent window disposed between the wafer pedestal and the radiation source. The transparent window has a first zone having a first rough surface, and an Ra value of the first rough surface is between approximately 0.5 &#x3bc;m and approximately 100 &#x3bc;m. The apparatus for wafer processing further includes a primary reflector disposed in the radiation source, and a secondary reflector disposed between the transparent window and the radiation source. The rough surface can be provided over the transparent window, the primary reflector, and/or the secondary reflector.

Apparatus for wafer processing

Semiconductor device metallization systems and methods are disclosed. In some embodiments, a metallization system for semiconductor devices includes a mainframe, and a plurality of modules disposed proximate the mainframe. One of the plurality of modules comprises a physical vapor deposition (PVD) module and one of the plurality of modules comprises an ultraviolet light (UV) cure module.

Method of manufacturing a semiconductor device

Semiconductor device metallization systems and methods

A method for forming a semiconductor device utilizing a chemical-mechanical polishing (CMP) process is provided. In one example, the method includes sequentially performing a first CMP process for removing a first portion of an oxide surface of a semiconductor device using a high selectivity slurry (HSS) and a first polish pad, interrupting the first CMP process, cleaning the semiconductor device and the first polish pad, and performing a second CMP process for removing a second portion of the oxide surface.

Scratch reduction for chemical mechanical polishing

A method for chemical mechanical polishing (CMP) of a shallow trench isolation (STI) structure employs a sequence of slurry polishes. In the first step the substrate is polished with either silica-based slurry or diluted ceria-based slurry. The first polishing is at a higher removal rate than the second polishing step. The polishing proceeds with some planarization but does not expose the polish stop layer. After partial planarization, the high selectivity slurry was used to complete the process. Improved throughput, lower defects and good within wafer uniformity are achieved.

Method for chemical mechanical polishing of a shallow trench isolation structure

An in-line hot-wire sensor for monitoring the mixing and the flow rate of slurry is disclosed. The hot-wire sensor may include a number of resistors organized into a Wheatstone bridge, as well as a frequency-domain transform mechanism. The resistors include a hot-wire resistor that is placed in-line with the slurry after substances have been mixed to become the slurry. The Wheatstone bridge thus yields a signal that is transformed to the frequency domain by the frequency-domain transform mechanism, such as by performing a Fast Fourier Transform (FFT) of the signal. The frequency-domain transform is used to monitor the mixing of the substances into the slurry, and the flow rate of the slurry. The signal may be amplified prior to transformation to the frequency domain.

In-line hot-wire sensor for slurry monitoring

In a method of the present invention, an intermediate structure having a top surface is provided. An isolation trench is formed is the intermediate structure. Isolation material is deposited over the intermediate structure. The isolation material fills the isolation trench. Excess isolation material extends above the top surface of the intermediate structure. Part of the excess isolation material is removed until there is a predetermined thickness of isolation material remaining on the top surface of the intermediate structure. A contact opening is formed in the isolation material at the isolation trench. The contact opening extends through at least part of the intermediate structure. Contact material is deposited over the isolation material. The contact material fills the contact opening. Excess contact material, if any, that extends above the isolation material is removed. The excess isolation material is removed at least until the top surface of the intermediate structure is reached.

Method of forming a contact on a silicon-on-insulator wafer

A method for improving CMP polishing uniformity and reducing or preventing cracking in a semiconductor wafer process surface by reducing stress concentrations adjacent to dummy features including providing a semiconductor wafer process surface including active features and dummy features formed adjacently to the active features to improve a CMP polishing uniformity said dummy features each shaped to define an enclosed area in said semiconductor wafer process surface plane comprising at least 5 corner portions; and, performing a CMP process on said semiconductor wafer process surface.

Method for improving semiconductor process wafer CMP uniformity while avoiding fracture

A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.

Chemical mechanical polisher equipped with chilled retaining ring and method of using

A dual detection method for end point in a chemical mechanical polishing process is described. The dual detection method utilizes both an optical detection device and an acoustical detection device. The acoustical detection device may also be used independently in certain applications without the optical detection device. The acoustical detection device determines an end point and stops the CMP process when a volume of the acoustical emission changes by at least 30% from its initial volume, or preferably changes by at least 50% from its initial volume.

Dual detection method for end point in chemical mechanical polishing

A polishing head for holding a wafer during a polishing process without the edge-effect or the edge peeling defect and a method for improving edge profile on a wafer during a polishing process are described. The polishing head is constructed by a carrier head, a retaining ring, and at least three piezoelectric actuator/sensors mounted in-between a recessed peripheral edge portion of the carrier head and a top surface of the retaining ring.

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Taipei, Taiwan

Tung-Ching Tseng