Applied Materials, Inc.

Tsutomu Tanaka

Kartik Ramaswamy

Kenneth S Collins

Andrew Nguyen

Hiroji Hanawa

Dmitry A Dzilno

Hari K Ponnekanti

Yan Ye

Kevin P Fairbairn

Canfeng Lai

John C Forster

Jozef Kudela

David Wingto Cheung

Thomas E Nowak

Amir Hamed Al-Bayati

Alexander Viktorovich Garachtchenko

Mukul Kelkar

John M White

Li-Qun Xia

Anantha K Subramani

Kallol Bera

Suhail Anwar

Carl A Sorensen

Khokan Chandra Paul

Keiichi Tanaka

Adam J Fischbach

Mihaela A Balseanu

Shamouil Shamouilian

Michael Santiago Cox

Jared Ahmad Lee

Seon-Mee Cho

Mario Dave Silvetti

Kenichi Ohno

Rakesh Ramadas

Ning Li

Tetsuya Ishikawa

Sanjeev Baluja

Gregory J Wilson

Peter K Loewenhardt

Mandyam Sriram

Timothy Joseph Franklin

Martin Jay Seamons

Edward P Hammond

Sebastien Raoux

Carlaton Wong

Ravikumar Patil

Xiaopu Li

Chau H Nguyen

Kaveh F Niazi

Sriharish Srinivasan

Vijet Patil

Ranjit Indrajit Shinde

Douglas D Truong

Ran Liu

Juan Carlos Rocha-Alvarez

Jeonghoon Oh

Bok Hoen Kim

Visweswaren Sivaramakrishnan

Majeed Foad

Peter I Porshnev

Mark A Fodor

Padmanabhan Krishnaraj

Moshe Sarfaty

Dian Sugiarto

Jonghoon Baek

Tzu-Fang Huang

Edwin C Suarez

Ping Xu

Ian Scot Latchford

Robert B Moore

Peter Wai-Man Lee

Stefan A Wolff

Abhijit Ashok Kangude

Cong Trinh

Mario David Silvetti

Sudhakar Subrahmanyam

Michael P Nault

Lihua Li

Robert Duncan

Maribel Maldonado-Garcia

Jason K Foster

Marc David Shull

Nam Le

S&eacute;bastien Raoux

Bok Heon Kim

Mike Barnes

Ameeta Madhava

Avinash Ishwar Shervegar

Mike Murtagh

Heath B DeShong

Kenneth E Balish

Mark Beals

Malcal Kelka

Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

Semiconductor processing chambers and methods for deposition and etch

The disclosure describes a plasma source assemblies comprising a differential screw assembly, an RF hot electrode, a top cover, an upper housing and a lower housing. The differential screw assembly is configured to provide force to align the plasma source assembly vertically matching planarity of a susceptor. More particularly, the differential screw assembly increases a distance between the top cover and the upper housing to align the gap with the susceptor. The disclosure also provides a better thermal management by cooling fins. A temperature capacity of the plasma source assemblies is extended by using titanium electrode. The disclosure provides a cladding material covering a portion of a first surface of RF hot electrode, a second surface of RF hot electrode, a bottom surface of RF hot electrode, a portion of a surface of the showerhead and a portion of lower housing surface.

Vertically adjustable plasma source

Plasma source assemblies, gas distribution assemblies including the plasma source assembly and methods of generating a plasma are described. The plasma source assemblies include a powered electrode with a ground electrode adjacent a first side and a dielectric adjacent a second side. A first microwave generator is electrically coupled to the first end of the powered electrode through a first feed and a second microwave generator is electrically coupled to the second end of the powered electrode through a second feed.

Microwave plasma source for spatial plasma enhanced atomic layer deposition (PE-ALD) processing tool

Exemplary processing systems may include a chamber body. The systems may include a pedestal configured to support a semiconductor substrate. The systems may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be coupled with an RF power source. The systems may include a remote plasma unit. The remote plasma unit may be coupled at electrical ground. The systems may include a discharge tube extending from the remote plasma unit towards the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically coupled with each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending about the central aperture of the discharge tube.

Semiconductor processing chamber to accommodate parasitic plasma formation

Methods of depositing thin films for an electronic device, for example a semiconductor device include applying a first pulsed plasma with or without a reactant and a second continuous plasma with a reactant.

Thin layer deposition with plasma pulsing

Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The processing region may be defined between a faceplate and a substrate support on which the semiconductor substrate is seated. The methods may include forming a treatment plasma within the processing region of the semiconductor processing chamber. The treatment plasma may be formed at a first power level from a first power source. A second power may be applied to the substrate support from a second power source at a second power level. The methods may include densifying the flowable film within the feature defined within the semiconductor substrate with plasma effluents of the treatment plasma.

Single chamber flowable film formation and treatments

Processing chambers with a plurality of processing stations and individual wafer support surfaces are described. The processing stations and wafer support surfaces are arranged so that there is an equal number of processing stations and heaters. An RF generator is connected to a first electrode in a first station and a second electrode in a second station. A bottom RF path is formed by a connection between a first support surface and a second support surface.

Paired dynamic parallel plate capacitively coupled plasmas

Apparatus and methods to control the phase of power sources for plasma process regions in a batch process chamber. A master exciter controls the phase of the power sources during the process sequence based on feedback from the match circuits of the respective plasma sources.

Methods and systems to modulate film stress

Plasma source assemblies, gas distribution assemblies including the plasma source assembly and methods of generating plasma are described. The plasma source assemblies include a powered electrode with a ground electrode adjacent a first side and a dielectric adjacent a second side. A first microwave generator is electrically coupled to the first end of the powered electrode through a first feed and a second microwave generator is electrically coupled to the second end of the powered electrode through a second feed.

A plasma source assembly for use with a substrate processing chamber is described. The assembly includes a ceramic lower plate with a plurality of apertures formed therein. A method of processing a substrate in a substrate processing chamber including the plasma source assembly is also described.

Plasma source with ceramic electrode plate

Semiconductor processing chambers for deposition and etch

Plasma source assemblies comprising an RF hot electrode having a body and at least one return electrode spaced from the RF hot electrode to provide a gap in which a plasma can be formed. An RF feed is connected to the RF hot electrode at a distance from the inner peripheral end of the RF hot electrode that is less than or equal to about 25% of the length of the RF hot electrode. The RF hot electrode can include a leg and optional triangular portion near the leg that extends at an angle to the body of the RF hot electrode. A cladding material on one or more of the RF hot electrode and the return electrode can be variably spaced or have variable properties along the length of the plasma gap.

Shaped electrodes for improved plasma exposure from vertical plasma source

Processing chambers with a plurality of processing stations and individual wafer support surfaces are described. The processing stations and wafer support surfaces are arranged so that there is an equal number of processing stations and heaters. An RF generator is connected to a first electrode in a first station and a second electrode in a second station. A bottom RF path is formed by a connection between the a first support surface and a second support surface.

Growing community of inventors

Santa Clara, CA, United States of America

Tsutomu Tanaka