Taiwan Semiconductor Manufacturing Comp. Ltd.

Tsu Shih

Syun-Ming Jang Jang

Ying-Ho Chen

Chen-Hua Douglas Yu

Jih-Churng Twu

Wen-Chih Chiou

Jui-Yu Chang

Jeng-Horng Chen

Chung-Long Chang

Shau-Lin Shue

Anthony Yen

Weng Chang

So Wein Kuo

Sung-Ming Jang

Chia-Shiung Tsai

Chi-Wen Liu

Tien-I Bao

Yung-Cheng Lu

Jing-Meng Liu

Ming-Hsing Tsai

Chen-Cheng Kuo

Hung-Wen Su

Hung-Chang Hsieh

Hsien-Ming Lee

Shen-Nan Lee

Shun-Liang Hsu

Yuan-Chang Huang

Chao-Chieh Tsai

Tien-Chen Hu

Han-Hsin Kuo

Tung-Ching Tseng

Chu-Wei Hu

Chen Cheng Chou

Sheng Hsiung Chen

Chia-Ming Yang

Chih-Chien Hung

Chen Hua Yu

Hungtse Lin

Wen-Jye Tsai

Cheng Chung Lin

Shun Long Chen

Syun Ming Jang

Chi-Wei Chung

Wen-Chin Chiou

Chung Chi Ko

Kuan-Ku Hung

Wen-Hun Tung

Kun Ku Hung

Jih-Churng Jwu

Lih Ping Li

Frank Hsu

Jih-Chuyng Twu

Jih-Chung Twu

Chen-Hua Yui

Sa-Na Lee

Chi-Weng Chung

A method for removing a metal oxide overlayer over a target polishing surface in conjunction with a chemical mechanical polishing (CMP) process to improve polishing uniformity including providing a substrate target polishing surface having a layer of an oxide of a metal overlying said metal to be chemically mechanically polished; removing the layer of an oxide of the metal using an oxide removal solution prior to performing a CMP process with an abrasive slurry; and, polishing the target polishing surface according to an a CMP process with an abrasive slurry including at least one of an oxidizer and a complexing agent.

Method for achieving uniform CU CMP polishing

An improvement in a copper damascene process is disclosed. The improvement comprises the step of projecting an electron beam on to a chemical mechanically polished material surface having copper filled etched trenches at a known angle of incidence with respect to the material surface for a known period of time, the electron beam having a beamwidth substantially covering the material surface and a known intensity.

Method for copper surface smoothing

A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process including providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion including active areas having semiconductor devices features formed therein the process surface including a dielectric insulating layer; forming a plurality of openings in the periphery portion to form closed communication with the dielectric insulating layer the plurality of openings having an aspect ratio of at least 2; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of openings to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.

Method for forming patterned features at a semiconductor wafer periphery to prevent metal peeling

A method is provided for forming contact/via hole openings without the detrimental volcano effect that is normally encountered in forming damascene structures. It is disclosed that the hole openings are needed to be filled with a protective material, in the first place, so as to prevent any damage to the exposed surface at the bottom of the openings. However, the filling material must be chosen properly, for otherwise, the material can leave behind a scum-like residue which then can erupt like a volcano during the subsequent process steps, which in turn can lead to functionality as well as reliability problems. It is disclosed in the present invention that when i-line photoresist (i-line PR), or, spin-on organic oxide is used as the protective filler material, the volcano effect can be avoided, and a Cu dual damascene interconnect with low RC delay characteristics can be obtained.

Method to eliminate via poison effect

A sacrificial semiconductor feature for preventing corrosion that can result during chemical-mechanical planarization (CMP) is disclosed. A semiconductor device of the invention is fabricated at least in part by performing CMP. The device includes a desired semiconductor feature and a sacrificial semiconductor feature. The desired semiconductor feature may have an unbalanced geometric pattern that includes a metallic line ending in at least one tip. The at least one tip is susceptible to corrosion resulting from performing CMP. The sacrificial semiconductor feature is preferably located off the metallic line of the desired semiconductor feature. The sacrificial semiconductor feature attracts charge induced during CMP that is otherwise attracted by the at least one tip of the desired semiconductor feature. The presence of the sacrificial semiconductor feature thus substantially prevents corrosion of the desired semiconductor feature, including its tip(s).

Sacrificial feature for corrosion prevention during CMP

A method for avoiding processing damage to an anisotropically etched damascene feature in a reworking process including providing a first photoresist layer over a first anisotropically etched opening the first photoresist layer photolithographically patterned for forming a second anisotropically etched opening overlying the first anisotropically etched opening; blanket depositing a flowable resinous polymeric material to form a resinous layer over the first photoresist layer in a reworking process to include filling a remaining portion of the first anisotropically etched opening; removing the resinous layer and the first photoresist layer in a planarizing process to reveal an upper substrate surface; and, depositing a second photoresist layer over the upper substrate surface for photolithographic patterning of the second anisotropically etched opening overlying the first anisotropically etched opening in the reworking process.

Method for damascene reworking

A new method is provided for the post-deposition treatment of copper lines. A damascene copper line pattern whereby a TaN barrier layer and a seed layer have been provided is polished. Under the first embodiment of the invention, the deposited copper is polished (Cu CMP), the surface of the wafer is rinsed using a first High Flow DI rinse that contains a TBA inhibitor. The TaN CMP is performed immediately following the first High Flow DI rinse. A second High Flow DI rinse is applied using DI water that contains TBA inhibitor. The required following rinse step is executed immediately after the second High Flow DI rinse has been completed. Under the second embodiment of the invention, the process of CMP has been divided in two distinct steps where the first step is aimed at corrosion elimination and the second step is aimed at elimination of mechanical damage to the polished copper. The processing conditions for the second processing step have been extended and optimized, thereby using a second belt of a CMP apparatus.

Eliminate broken line damage of copper after CMP

A method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process including providing a semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the semiconductor wafer polishing surface according to a first CMP process including applying at least one polishing slurry to contact the semiconductor wafer polishing surface for removing an uppermost layer of the semiconductor wafer polishing surface; and, alternately applying a copper corrosion inhibitor solution for a period of time and the at least one polishing slurry for a period of time to contact the semiconductor wafer polishing surface to comprise a polishing cycle said polishing cycle performed at least once during at least a second CMP process.

Method for preventing localized Cu corrosion during CMP

A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.

Chemical mechanical polisher equipped with chilled retaining ring and method of using

A linear polisher for polishing a substrate that always provides a fresh abrasive surface for polishing and a method for linear polishing a substrate are described. In the linear polisher, a length of a polishing pad is supported on a pair of rollers which are driven by a motor means for either intermittently or continuously advancing the pad during a polishing process. A vibration generator which is connected to the polishing pad through an adaptor provides lateral, or vibration in a transverse direction of the pad throughout the polishing process. The present invention novel linear polisher enables substantially constant removal rate to be achieved throughout the pad life of a polishing pad without deterioration such as that normally seen in a conventional rotary or linear CMP apparatus. Optionally, a rotatable substrate holder is utilized to further improve the polishing uniformity of the linear polishing apparatus.

Apparatus and method for linear polishing

A bimodal slurry system for a chemical mechanical polishing process including a dispersion comprising a plurality of first particles and a plurality of at least one type of second particles said first particles having a mean particle diameter larger by at least a factor of 3 than a mean particle diameter of the at least one type of second particles said first particles further being compressible.

Bimodal slurry system

A method and apparatus for implementing the method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process the method providing at least one semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the at least one semiconductor wafer polishing surface according to a CMP process having a polishing pad surface contacting the at least one it semiconductor wafer polishing surface at least a portion of the polishing pad in electrically conductive communication with a conductive polishing platen; and, providing at least one electrically conductive pathway from the conductive polishing platen.

Method for preventing or reducing anodic Cu corrosion during CMP

A method for preventing copper corrosion on a wafer during a chemical mechanical polishing process when the process is temporarily halted due to equipment malfunction and an apparatus for carrying out such method are disclosed. In the method, after the chemical mechanical polishing process is stopped for correcting equipment malfunction or any other processing problems, a cleaning solvent is sprayed toward the wafer surface to remove substantially all slurry solution from the surface to prevent corrosion of the copper layer, or other metal layer, by the slurry solution. The cleaning solvent may be sprayed from spray nozzles mounted around and juxtaposed to the polishing table onto which the polishing pad is mounted as long as the spray nozzles do not interfere with the rotation of the polishing pad.

Method and apparatus for preventing metal corrosion during chemical mechanical polishing

A continuous loop polishing pad that is reinforced by a reinforcing filler and a method for fabricating the polishing pad are described. The reinforced polishing pad is constructed by a sub-layer and a top layer, wherein the sub-layer defines an inner diameter of the polishing pad and contains a reinforcing filler with an aspect ratio of at least 10 oriented substantially in a circumferential direction of the continuous loop polishing pad. The top layer is laminated to the sub-layer with a top surface defining an outer diameter of the polishing pad, while both the sub-layer and the top layer are formed of a polymeric material. The invention further describes a method for fabricating the reinforced polishing pad in a continuous loop.

Reinforced polishing pad for linear chemical mechanical polishing and method for forming

A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.

Reduction of Cu line damage by two-step CMP

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Hsin-Chu, Taiwan

Tsu Shih