Vlsi Technology, Inc.

Tsing-Chow Wang

Louis H Liang

Thomas Joel Massingill

Francisca Tung

Marlita F Macaraeg

Serena M Luo

The ball bump structure of the subject invention provides a hermetically sealed bond pad at the surface of a semiconductor chip. An adhesion pad is formed at the surface of the bond pad. The adhesion pad includes a barrier layer, preferably a titanium/tungsten alloy, and a bonding layer, for example, a sputtered gold layer. A gold ball bump is formed on the adhesion pad. Methods for forming the improved structure herein are also disclosed.

Bump formation on yielded semiconductor dies

A semiconductor device interconnect package assembly for TAB packages is disclosed having a central portion of material which is utilized as part of the package structure to provide scratch protection to the active surface of a semiconductor die and to the inner lead bonding areas. The central portion of material can be modified in various ways to improve the overall performance of the package, and to reduce stress generated in the TAB package due to thermal mismatch. The assembly also includes a plurality of apertures in the substrate film which overlap and expose a plurality of groups of inner lead portions. The plurality of apertures allows each group of exposed inner lead portions to be encapsulated independently from each other group. By encapsulating each of these groups separately, scratch protection is provided to the inner lead bonding areas while simultaneously reducing the stress on each of the leads due to the heating and cooling of the encapsulating material.

Semi-conductor device interconnect package assembly for improved package

Power and ground connections are provided using or more conductive layers provided in an integrated-circuit package design. A leadframe has either a tape assembly or a heat-conducting dielectric ceramic substrate attached to the die-attach paddle of the leadframe and one or more conductive planes are formed on the top surface of the tape assembly or the ceramic substrate. The tape assembly includes a conductive metal layer, a polyimide layer, and an adhesive layer. The metal layer on the tape or ceramic substrate and the metal die-attach pad of the leadframe are used as low inductance power planes providing connections to the integrated-circuit. No vias are used. Use of a metal die-attach paddle for the leadframe is optional when a ceramic substrate is used.

Leadframe having one or more power/ground planes without vias

A process for fabricating conductive bumps on the bond pads of yielded good die includes forming a transparent structure upon which a masking layer is formed, aligning yielded good die and attaching them to the masking layer, and attaching a backing material to the backside of the die for mechanical support. The transparent structure is then removed and fabrication of the bumps continued on the bond pads of the good die by conventional means.

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San Jose, CA, United States of America

Tsing-Chow Wang