Hitachi Chemical Company, Ltd.

Other

Sharp Corporation

Hitachi Co., Ltd

Toshio Yamazaki

Yoshiaki Tsubomatsu

Fumio Inoue

Naoki Fukutomi

Hirohito Ohhata

Hiroshi Nomura

Shinsuke Hagiwara

Hidehiro Nakamura

Noriyuki Taguchi

Masami Yusa

Yoshiki Sota

Yorio Iwasaki

Tetsuya Enomoto

Hiroshi Kawazoe

Koji Miyata

Shigeki Ichimura

Yasuhiko Awano

Toshiaki Tanaka

Akira Nagai

Itsuo Watanabe

Kazunori Yamamoto

Masaaki Yasuda

Tomohisa Ohta

Yoshiaki Wakashima

Aizou Kaneda

Kazuyoshi Kojima

Osamu Watanabe

Kenzo Takemura

Akinari Kida

Tsutomu Kitakatsu

Masahiko Itabashi

Susumu Naoyuki

Naoyuki Shiozawa

Kazuhisa Suzuki

Hiroto Ohata

A wiring substrate () comprises an insulating base () with connection holes (), buried conductors () provided in the connection holes () without reaching a rear surface of the insulating base (), and wiring layersconnected to the buried conductors (). The buried conductors () thicken the wiring layers (), and can form aligning parts () on the rear surface of the connection holes () to be used for three-dimensional mounting structure. Each wiring layer () includes thin terminals (A), wirings (B) and thick electrodes (C). Not only the terminals (A) and wirings (B) but also the buried conductors () are raised by the same manufacturing process. A semiconductor element () is attached to the electrodes (C) of the wiring substrate ().

Method of manufacturing wiring substrate

Wiring board, semiconductor device, and method of manufacturing wiring board

A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

Fabrication process of semiconductor package and semiconductor package

A semiconductor device fabrication process comprising an encapsulation step of carrying out encapsulation by vacuum pressure differential printing by the use of a liquid resin encapsulant containing a solvent in an amount of from 5% by weight to 50% by weight, and preferably from 25% by weight to 50% by weight. The encapsulation step comprises: printing the liquid resin encapsulant by vacuum pressure differential printing in such a way that; the encapsulant covers at least an internal connecting terminal provided on a substrate, a semiconductor chip, and a wire interconnecting the internal connecting terminal and the semiconductor chip; and that the thickness of the encapsulant lying above the wire at the highest position of the wire comes to be at least 0.8 times the thickness of the encapsulant lying beneath the wire at the same position; and curing or drying the encapsulant.

Semiconductor device and method of fabrication thereof

A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.

Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package

Method of production of semiconductor device

A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting a substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.

Substrate for holding a chip of semi-conductor package, semi-conductor

The object of the present invention is to provide a wiring board fabrication process which is, not only so smooth on the surface that a fine wiring pattern can be formed thereon, but also suitable for mounting electronic parts having fine pitch terminals. The present invention is a fabrication process of a wiring board which comprises a wiring conductive line embedded in the surface of an insulating substrate so that the upper face of the conductive line and the surface of the substrate are flat, and a through-hole land which is a conductive portion projected from the surface of the substrate in a through-hole portion, which is characterized in removing the conductive portion projected from the surface of the substrate in the through-hole portion so as to have a flat surface on the surface of the substrate.

Fabrication process of wiring board

Growing community of inventors

Ibaraki-ken, Japan

Toshio Yamazaki