Fujitsu Corporation

Toshio Fujii

Naoki Yokoyama

Hironori Nishino

Shunichi Muto

Yusuke Matsukura

Hideaki Ishikawa

Yoshihiro Sugiyama

Toshiro Futatsugi

Yoshihiro Miyamoto

Tsuguo Inata

Nobuyuki Kajihara

Yasuhito Uchiyama

Toshio Oshima

Satoshi Hiyamizu

Adarsh Sandhu

Kazuaki Ishii

Eizo Miyauchi

Akihiro Shibatomi

At least one or more dark current reducing layers having a quantum well structure are provided at an end portion in a stacking direction of an infrared detecting section in which quantum dot layers are stacked.

Infrared detector

A multi-quantum well infrared photo-detector, in which a plurality of multi-quantum well layers having respective sensitivities for different wavelength ranges of infrared are layered via a common contact layer. The infrared photo-detector includes a switch where one end is connected to the above common contact layer, and a current integration unit which is connected to the other end of the above switch. First and second voltages are applied to first and second contact layers at the opposite side of first and second multi-quantum well layer respectively. The above switch is conducted for a predetermined time so that either voltage between the above common contact layer and the first contact layer or voltage between the above common contact layer and the second contact layer becomes higher than the other, and the above current integration unit is charged or discharged by the current which flows in the above multi-quantum well layers.

Multi-quantum well infrared photo-detector

A method of growing a plurality of epitaxial layers each having a property which is different from each other simultaneously on a common substrate comprises steps of forming at least a first crystal surface and a second crystal surface which are crystallographically non-equivalent to each other on the substrate, introducing particles comprising constituent elements of the epitaxial layers into a region in the vicinity of the substrate, the particles including at least metal-organic molecules containing one of the elements constituting the epitaxial layers, decomposing the metal-organic molecules such that the layer constituting element therein is released as a result of the decomposition, and depositing the aforesaid particles including the element released by the decomposition of the metal-organic molecules on the first and second crystal surfaces so that a first epitaxial layer and a second epitaxial layer, respectively differing in properties from each other, are grown on respective the first and second crystal surfaces, the step of deposition being performed such that the growth of the first and second epitaxial layers is controlled by the decomposition of the metal-organic molecule.

Method of growing epitaxial layers

A method of fabricating a semiconductor device having an epitaxial layer of a group III-V semiconductor material provided on an underlying crystal layer with a lattice matching therewith, the semiconductor material being doped to the p-type by addition of beryllium and selected from a group including gallium aluminum arsenide and indium gallium aluminum arsenide, in which the method comprises steps of growing the epitaxial layer on the underlying crystal layer, adding beryllium to a concentration level of about 5.times.10.sup.19 atoms/cm.sup.3 to about 5.times.10.sup.20 atoms/cm.sup.3 to the semiconductor material, and adding indium by an amount of about 0.5 mole percent to about 8 mole percent with respect to group III elements in the semiconductor material.

Method of fabricating a heterojunction bipolar transistor

In an optosemiconductor device including a superlattice configuration (TBQ) of first and second quantum well layers and a potential barrier therebetween, photo-excited carriers are formed in the first quantum well layer and are tunnelled through the potential barrier toward the second quantum well layer, so that the tunneled carriers are accumulated in the second quantum well layer. An electric field is applied to the superlattice configuration to expel the tunneled carriers from the second quantum well layer.

High speed optosemiconductor device having multiple quantum wells

A semiconductor quantum effect device having negative differential resistance characteristics includes a composite potential barrier layer including a first potential barrier layer and a second potential barrier layer; a carrier injection side semiconductor layer connected in contact with the first potential barrier layer; and a carrier injected side semiconductor layer connected in contact with the second potential barrier layer. The semiconductor material elements forming the respective layer satisfy the condition that, when the voltage is not applied to the semiconductor material elements, the energy level at the bottom of conduction band in the carrier injection side semiconductor layer and in the carrier injected side semiconductor layer is lower than the energy level at the top of the valance band in the second potential barrier layer and that a Fermi level within the second potential barrier layer is nearly at the same level as the Fermi level within the barrier injected side semiconductor layer, and an electron and a hole are operated in a cooperative relation therebetween.

Semiconductor quantum effect device having negative differential

An electrode structure of an electrode of a refractory metal or a silicide thereof on a layer of In.sub.x Ga.sub.1-x As (0&lt;x&lt;1) on a substrate of a III-V compound semiconductor is ohmic and is stable even at a high temperature, for example, 900.degree. C. This high temperature stable ohmic electrode structure allows ion implantation into the substrate with the electrode as a mask followed by annealing to form a doped region in alignment with the edge of the electrode.

Method of forming a high temperature stable ohmic contact to a III-V

Group III-V multi-alloy semiconductors, such as ternary, quaternary, and pentanary semiconductors, grown on a binary group III-V compound semiconductor substrate, are used as an active layer in opto-devices, high electron mobility transistors, etc. A method of growing multilayers, lattice-matched to the binary substrate and having specific energy band gaps, includes a molecular beam epitaxy (MBE) process. The present invention includes growing a quaternary or pentanary semiconductor layer using a minimum number of effusion cells and eliminating readjustment of molecular beam intensities from one layer to another layer during a series of epitaxial growth steps. As an example of quaternary growth, four effusion cells are utilized and two combinations of three effusion cells are alternately operated, one including an Al effusion cell and the other including a Ga effusion cell. Each of the three effusion cells is capable of growing a ternary semiconductor lattice-matched to the substrate. Two groups of pulsed molecular beams, each pulse having a width corresponding to a growth time less than that required to grow three atomic layers, grow a quaternary alloy semiconductor also lattice-matched to the substrate. Similarly, a method of growing a pentanary alloy semiconductor utilizing five effusion cells in a MBE system can be employed.

Method of growing quaternary or pentanary alloy semiconductor

A resonant tunneling semiconductor device having a large peak-to-valley current density J.sub.p /J.sub.v ratio comprises an InP substrate, a first contact compound semiconductor lattice-matched to Inp, a first barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z (In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0&lt;z.ltoreq.1), a well layer of In.sub.1-y Ga.sub.y As, (0.48.gtoreq.y.gtoreq.0.46), a second barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z -(In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0&lt;z.ltoreq.1), and a second contact layer compound semiconductor lattice-matched to InP:The first and second barrier layers and the well layer forming a quantum-well structure. Instead of the quantum-well structure above, it is possible to adopt the quantum-well structure of strained-layers comprising first and second barrier layers which are of In.sub.1-x Al.sub.x As (0.48&lt;x.ltoreq.1) and have a thickness of 0.5 to 10.0 nm.

Resonant tunneling semiconductor device

A high electron mobility single heterojunction semiconductor devices having a layer configuration comprising a N-type AlGaAs layer grown on an undoped GaAs layer grown on an undoped AlGaAs layer grown on a semiconductor substrate containing an impurity producing a deep level. The undoped AlGaAs layer has at least three functions including (a) a getter for the deep level impurity which may be diffused from the substrate during an annealing process, (b) a buffer improving the crystal condition of the undoped GaAs layer, and (c) a test layer grown for the purpose of predetermining the intensity of molecular or ion beams for each of Al, Ga, As and dopants e.g. Si. This allows annealing processes and ion implantation processes to be introduced to the method for production of this type of semiconductor devices without reducing the electron mobility thereof.

Growing community of inventors

Atsugi, Japan

Toshio Fujii