Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Toshiaki Kitano

Kazushige Kawasaki

Hiroyuki Okazaki

Shinsuke Watanabe

Tetsuya Ogawa

Kenichi Horiguchi

Norio Higashisaka

Yoichi Nogami

Yoshitaka Kamo

Hidetoshi Koyama

Takafumi Oka

Kenichiro Kurahashi

Hiroyuki Minami

A semiconductor device is configured to include: a base member of a semiconductor material which forms a thin plate shape; a front face electrode which is placed on a front surface of the base member; a rear face electrode which covers a rear surface of the base member; and a via hole which forms a hole shape provided with the front face electrode as a bottom and being open onto the rear surface, and through which the front face electrode and the rear face electrode are electrically connected to each other; wherein, at a circumferential edge portion of the base member on its side where the rear surface is located, a protrusion portion which protrudes in a thickness direction is disposed.

Semiconductor device including base member with protruding portion at circumferential edge

A nitride semiconductor layer () is provided on a Si substrate (). A gate electrode (), a source electrode () and a drain electrode () are provided on the nitride semiconductor layer (). A P-type conductive layer () in contact with the nitride semiconductor layer () is provided on the Si substrate () below the drain electrode ().

Semiconductor device

A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.

Field effect transistor

A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.

Semiconductor device and method for manufacturing the same

A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiOfilm; forming channels and a waveguide ridge between the channels in the wafer; forming an SiOfilm over the wafer; forming a resist pattern covering the SiOfilm in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiOfilm on the top of the waveguide ridge, the resist pattern exposing the SiOfilm on the top of the waveguide ridge; removing the SiOfilm and the deposited SiOfilm by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.

Method for manufacturing semiconductor optical device

After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose upper surfaces of source electrodes. Next, a metal interconnect line is formed by patterning a metal film formed on the entire top surface. Next, slits are formed in the metal interconnect line to partially expose an upper surface of the sacrificial layer. After the sacrificial layer is dissolved, the dissolved sacrificial layer is discharged through the slits to the outside. An air space is formed as a result of the removal of the sacrificial layer.

Method of manufacturing semiconductor device including air space formed around gate electrode

A semiconductor device includes an InP substrate; an undoped InAlAs buffer layer, an undoped InGaAs active layer, and an n type InAlAs electron supply layer successively disposed on the InP substrate; a T-shaped gate electrode on the n type electron supply layer, the T-shaped gate electrode having an upper overhanging part; n type InGaAs cap layers disposed on the n type electron supply layer at opposite sides of and spaced apart from the T-shaped gate electrode, each cap layer having a portion positioned beneath the upper overhanging part of the T-shaped gate electrode; and a source electrode and a drain electrode respectively disposed on the cap layers, each of these electrodes having a portion positioned beneath the upper overhanging part of the T-shaped gate electrode.

Field effect transistor with electrode portions under T-shaped gate

An etchant includes an aqueous solution containing citric acid, ammonium citrate, and hydrogen peroxide, wherein the mol ratio of ammonium citrate to citric acid is not less than 1. Using this etchant, a WSi layer on an InAlAs layer can be etched selectively with respect to the InAlAs layer.

Etchant, etching method, and method of fabricating semiconductor device

A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode; intermediate carrier concentration regions disposed in the GaAs substrate at opposite sides of and in contact with the low carrier concentration active region; high carrier concentration source and drain regions disposed in the GaAs substrate at opposite sides of and in contact with the intermediate carrier concentration regions and lying beneath the source and drain electrodes, respectively; and first and second high carrier concentration regions having a carrier concentration as high as or higher than that of the high carrier concentration source and drain regions. The first and second high carrier concentration regions are disposed in the intermediate carrier concentration regions and reach the surface. In this structure, extension of a surface depletion layer in the vicinity of the gate is restricted to the first and second high carrier concentration regions, so that the depletion layer and surface levels so not adversely affect device characteristics.

Method of producing metal semiconductor field effect transistor

A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode; intermediate carrier concentration regions disposed in the GaAs substrate at opposite sides of and in contact with the low carrier concentration active region; high carrier concentration source and drain regions disposed in the GaAs substrate at opposite sides of and in contact with the intermediate carrier concentration regions and lying beneath the source and drain electrodes, respectively; and first and second high carrier concentration regions having a carrier concentration as high as or higher than that of the high carrier concentration source and drain regions. The first and second high carrier concentration regions are disposed in the intermediate carrier concentration regions and reach the surface. In this structure, extension of a surface depletion layer in the vicinity of the gate is restricted to the first and second high carrier concentration regions, so that the depletion layer and surface levels do not adversely affect device characteristics.

An etchant includes a mixture of an organic acid, hydrogen peroxide, and a base added to adjust the pH. The etching solution has an eminent difference in the etching rates between GaAs and AlGaAs, GaAs and InGaAs, AlGaAs and InGaAs, InGaAs and AlGaAs, and InGaAs and GaAs. High selectivity etching is completed easily and with high precision. Precise control of etching of a heterostructure is achieved.

Etching solution and etching method for semiconductors and method for

An etchant includes an organic acid and hydrogen peroxide mixed in a volume ratio of 1:1 to 200:1 with a basic material added to adjust the pH. The etching solution presents an eminent difference in the etching rates between GaAs/AlGaAs, GaAs/InGaAs, AlGaAs/InGaAs, InGaAs/AlGaAs, and InGaAs/GaAs. High selectivity etching is completed easily and with high precision. Precise control of etching of a heterostructure is achieved.

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Tokyo, Japan

Toshiaki Kitano