Freescale Semiconductor,inc.

Toni D Van Gompel

Michael D Turner

Mark Douglas Hall

Rode R Mora

Mohamad M Jahanbani

Brian A Winstead

Konstantin V Loiko

Suresh Venkatesan

Laegu Kang

Peter J Beckage

Choh-Fei Yeap

Yongjoo Jeon

John J Hackenberg

Kuang-Hsin Chen

A method for making a semiconductor device is provided which includes (a) providing a layer stack comprising a semiconductor layer () and a dielectric layer () disposed between the substrate and the semiconductor layer, (b) creating a trench () which extends through the semiconductor layer and which exposes a portion of the dielectric layer, the trench having a sidewall, (c) creating a spacer structure () which comprises a first material and which is adjacent to the sidewall of the trench, and (d) forming a stressor layer () which comprises a second material and which is disposed on the bottom of the trench.

Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner

A method for forming a semiconductor isolation trench includes forming a pad oxide layer over a substrate and forming a barrier layer over the substrate. A masking layer is formed over the barrier layer and is patterned to form at least one opening in the masking layer. At least a part of the barrier layer and at least a part of the pad oxide layer are etched through the at least one opening resulting in a trench pad oxide layer. Etching of the trench pad oxide layer stops substantially at a top surface of the substrate within the isolation trench. An oxide layer is grown by diffusion on at least the top surface of the substrate corresponding to the at least one isolation trench. The method further includes etching the oxide layer and at least a portion of the substrate to form at least one isolation trench opening.

Method of forming a semiconductor isolation trench

A process of forming an electronic device can include patterning a semiconductor layer to define an opening. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface is spaced apart from the bottom of the opening. The sidewall can extend from the surface towards the bottom of the opening. The process can also include forming a layer over the semiconductor layer and within the opening, and removing a part of the first layer from within the opening. After removing the part of the layer, a remaining portion of the layer may lie within the opening and adjacent to the bottom and the sidewall, and the remaining portion of the layer may be spaced apart from the surface. In another aspect, the electronic device can include a field isolation region including the first layer.

Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer

A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface can be spaced apart from the insulating layer, and the sidewall can extend from the surface towards the insulating layer. The process can also include depositing a nitride layer within the opening, wherein depositing is performed using a PECVD technique. The process can further include densifying the nitride layer. The process can still further include removing a part of the nitride layer, wherein a remaining portion of the nitride layer can lie within the opening and be spaced apart from the surface.

Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer

A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning a semiconductor layer, the semiconductor layer can have a sidewall and a surface, the surface can be spaced apart from the insulating layer, and the sidewall can extend from the surface towards the insulating layer. The process can also include chemical vapor depositing a first layer adjacent to the sidewall, wherein the first layer lies within the opening and adjacent to the sidewall, and is spaced apart from the surface. Chemical vapor depositing the first layer can be performed using an inductively coupled plasma.

Process of forming an electronic device including a layer formed using an inductively coupled plasma

A method for forming trench isolation in an SOI substrate begins with a pad oxide followed by an antireflective coating (ARC) over the upper semiconductor layer of the SOI substrate. The pad oxide is kept to a thickness not greater than about 100 Angstroms. An opening is formed for the trench isolation that extends into the oxide below the upper semiconductor layer to expose a surface thereof. The pad oxide is recessed along its sidewall with an isotropic etch. This is followed by a thin, not greater than 50 Angstroms, oxide grown along the sidewall of the opening. This grown oxide avoids forming a recess between the ARC and the pad oxide and also avoids forming a void between the surface of the lower oxide layer and the grown oxide. This results in avoiding polysilicon stringers when the subsequent polysilicon gate layer is formed.

Method for elimination of excessive field oxide recess for thin Si SOI

A process for forming an isolation trench in a wafer. The process includes depositing (e.g. by a directional deposition process) a first dielectric material in the trench and then depositing a second dielectric material (e.g. by a directional deposition process) over the first dielectric material in the trench. A third material is deposited in the trench on the second layer. The second material and the third material are selectively etchable with respect to each other. In one example, the first material has a lower dielectric constant than the second material.

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Toni D Van Gompel