Hitachi Power Semiconductor Device, Ltd.

Tomoka Suematsu

Naoki Watanabe

Hiroshi Miki

Takeru Suto

In the present invention, in a FinFET having a channel forming region on a surface of a fin that is a semiconductor layer protruding on an upper surface of a substrate, a channel at a corner of the fin is prevented from becoming an ON state with a low voltage and a steep ON/OFF operation is made possible. As a means thereof, in a MOSFET that has a plurality of trenches, each of which have embedded therein a gate electrode, on an upper surface of an n-type epitaxial substrate provided with a drain region on a bottom surface and that has a channel region formed on a surface of a fin which is a protrusion part between the trenches adjacent to each other, a p-type body layer that constitutes a lateral surface of the fin, and a p-type semiconductor region that constitutes a corner which is an end of the upper surface of the fin, are formed.

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Tokyo, Japan

Tomoka Suematsu