Endicott Interconnect Technologies, Inc.

Corning Incorporated

I3 Electronics, Inc.

Endicott International Technologies, Inc.

Timothy Eugene Antesberger

Voya Rista Markovich

Frank Daniel Egitto

John Steven Kresge

William E Wilson

Rabindra N Das

John Joseph Konrad

Timothy Leroy Wells

James W Fuller, Jr

Stephen Krasniak

Dana Eugene Coots

Neil James Sidebottom

Dana Craig Bookbinder

Robert Maynard Japp

Kostas I Papathomas

Dell Joseph St Julien

Kevin Lee Wasson

Kenneth Richard Miller

Richard Curwood Peterson

Richard Dominic Bomba

Joseph Henry Citriniti

Mark Lee Humphrey

Kevin Eugene Elliott

Dominick John Forenz

Scott Winfield Deming

John Joseph Costello, Iii

Parasuram Padmanabhan Harihara

Christopher Lane Kerr

Brian Christopher Sheehan

John Charles Rector

Ryan Joseph Grohsmeyer

Zakariya Radwan Khayat

Brian Michael Adams

Seyed Amir Farzadfar

Marc Jason Cassada

Michael Joseph Joyce

Harry Robinson, Jr

James Arthur Youngman

Eric Jay Dacheux

Gary Michael Huzinec

A method of manufacturing an extrusion die (). The method comprises providing the extrusion die (), the extrusion die () having a plurality of die pins () defining a plurality of slots (), the plurality of die pins () having an initial die pin width and an initial die pin depth and the plurality of slots having an initial slot width (Ws) and an initial slot depth (Ds), providing a micro-milling machine () with a spindle (), providing a micro-cutting tool () coupled to the spindle (), mounting the extrusion die () proximate the micro-cutting tool (), and removing material from one or more die pins () using the micro-cutting tool (), the micro-cutting tool () making one or more cutting passes against the one or more die pins () to remove the material. Micro-milling apparatuses and further methods are provided, as are other aspects.

System for manufacturing of honeycomb extrusion dies and manufacturing methods thereof

Methods of manufacturing an extrusion die () having a plurality of pins (-) and a plurality of slots () defined by the plurality of pins, each pin having a base, the method including applying a coating material () over side walls of the bases of the pins of the extrusion die and removing a portion of the coating material coated over the side walls of the bases of the plurality of pins with a cutting tool (). In some embodiments, the cutting tool has a cutting width () equal to a target slot width () of the slots. In some embodiments, applying the coating material over the side walls of the bases of the pins includes overcoating a coating material to a thickness that is greater than a thickness needed to define a target slot width of the slots.

Extrusion dies and methods of manufacturing the same

Methods for forming an electrode for use in forming a honeycomb extrusion die. The method includes forming, by means of an additive manufacturing process, an electrode includes a base having a web extending from the base. The web defines a matrix of cellular openings. The method further includes forming a secondary electrode having a plurality of pins. The plurality of pins are shaped and arranged so as to mate with the matrix of cellular openings defined by the web of the electrode. The method further includes machining the electrode using the secondary electrode to smooth surfaces of the electrode formed by the additive manufacturing process.

Method of preparing an electrode for use in forming a honeycomb extrusion die

A system for delivering and applying a flowable mixture to an article (-) is disclosed. The system includes a mixture delivery system () and a skinning system (). The mixture delivery system () includes a mixer () configured to mix a dry material and a fluid to produce the flowable mixture, and a pump () configured to pump the flowable mixture to a delivery line. The skinning system () receives the flowable mixture from the mixture delivery system () through the delivery line. The skinning system () includes a skinning pipe () configured to apply the flowable mixture to the article (-) and a manifold () that supports the skinning pipe (). The skinning system () also includes an article feeding mechanism () configured to push the article (-) into the skinning pipe (). The skinning system () includes a transfer system () configured to hold the article (-) and move the article (-) out of the skinning pipe ().

Systems and methods for skinning articles

A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.

Coreless layer buildup structure with LGA and joining layer

A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.

Coreless layer buildup structure

Coreless layer buildup structure with LGA

An electronic package for interconnecting a high density pattern of conductors of an electronic device (e.g., semiconductor chip) of the package and a less dense pattern of conductors on a circuitized substrate (e.g., PCB), the package including in one embodiment but a single thin dielectric layer (e.g., Kapton) with a high density pattern of openings therein and a circuit pattern on an opposing surface which includes both a high density pattern of conductors and a less dense pattern of conductors. Conductive members are positioned in the openings to electrically interconnect conductors of the electronic device to conductors of the circuitized substrate when the package is positioned thereon. In another embodiment, the interposer includes a second dielectric layer bonded to the first, with conductive members extending through the second layer to connect to the less dense pattern of circuitized substrate conductors. Circuitized substrate assemblies using the electronic packages of the invention are also provided.

Electronic package including high density interposer and circuitized substrate assembly utilizing same

A method of making an electronic package designed for interconnecting high density patterns of conductors of an electronic device (e.g., semiconductor chip) and less dense patterns of conductors of hosting circuitized substrates (e.g., chip carriers, PCBs). In one embodiment, the method includes bonding a chip to a single dielectric layer, forming a high density pattern of conductors on one surface of the layer, forming openings in the layer and then depositing metallurgy to form a desired circuit pattern which is then adapted for engaging and being electrically coupled to a corresponding pattern on yet another hosting substrate. According to another embodiment of the invention, an electronic package using a dual layered interposer is provided. Also provided are methods of making circuitized substrate assemblies using the electronic packages made using the invention's teachings.

Method of making high density interposer and electronic package utilizing same

A power core adapted for use as part of a circuitized substrate, e.g., a PCB or LCC. The core includes a first layer of low expansion dielectric and two added layers of a different low expansion dielectric bonded thereto, with two conductive layers positioned on the two added low expansion dielectric layers. At least one of the conductive layers serves as a power plane for the power core, which in turn is usable within a circuitized substrate, also provided. Methods of making the power core and circuitized substrate are also provided. The use of different low expansion dielectric materials for the power core enables the use of support enhancing fiberglass in one layer while such use is precluded in the other two dielectric layers, thus preventing CAF shorting problems in highly precisely defined thru holes formed within the power core.

Power core for use in circuitized substrate and method of making same

A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a laser. In a preferred embodiment, the laser acts through a dielectric layer (soldermask) which is applied over the circuitry, including the commoning bar and connected parts. The laser may also be used to expose selected ones of the circuit's other parts, including various pads used to accommodate a wirebond (from a chip) and also solder balls for eventual placement of the substrate on a larger circuit board.

Method of making circuitized substrate

A method of making a circuitized substrate in which a commoning bar, used during the plating of the circuitry on the substrate and coupled to a second set of conductors which in turn are coupled to a first set of conductors, is terminated from the second set of conductors.

A method of removing selected portions of material from a base material using a plurality of different depth cuts (e.g., using laser cutting) such that apertured sections (or segments) are expeditiously removed for eventual use with another component or otherwise. In one example, the segmented section so removed can be used to bond various elements of an electronic package which in turn can then be positioned and used within an information handling system such as a computer, server, mainframe, etc.

Material separation to form segmented product

Growing community of inventors

Vestal, NY, United States of America

Timothy Eugene Antesberger