Taiwan Semiconductor Manufacturing Comp. Ltd.

Tien I Bao

Syun-Ming Jang Jang

Chung-Chi Ko

Lain-Jong Li

Hui-Lin Chang

Lih-Ping Li

Bi-Trong Chen

Shu E Ku

Yun-Chen Lu

Chih Hsien Lin

Hui Lin Chang

Li Ping Li

Yung Cheng Lu

A method of lowering the dielectric constant of an organosilicon low k dielectric layer while improving the hardness and thermal stability is provided. A deposited layer of carbon doped oxide, HSQ, or MSQ is cured and treated with a He plasma which improves hardness for a subsequent CMP step and lowers the dielectric constant. There is no loss of HO or CHduring the He treatment. The low k dielectric layer is then treated with a Hplasma which converts some of the Si&#x2014;O and Si&#x2014;CHbonds near the surface to Si&#x2014;H bonds, thereby further lowering the dielectric constant and increasing thermal stability that improves breakdown resistance. Moisture uptake is also reduced. The method is especially useful for interconnect schemes with deep sub-micron ground rules. Surprisingly, the k value obtained from two different plasma treatments is lower than when two He treatments or two Htreatment are performed.

Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties

A damascene structure and method for forming the same in a multi-density dielectric insulating layer the method including providing a substrate; forming at least a first layer comprising silicon oxide according to a first process having a first density; forming at least a second layer comprising silicon oxide according to a second process over the first layer having a second density less than the first density; etching a damascene opening through a thickness portion of the at least a first and the at least a second layer; and, filling the damascene opening to form a metal filled damascene.

Method for forming a multi-layer low-K dual damascene

In accordance with the objectives of the invention a new method is provided for improving adhesion strength that is deposited over the surface of a layer of copper. Conventional etch stop layers of for instance dichlorosilane (SiClH) or SiOC have poor adhesion with an underlying layer of copper due to poor molecular binding between the interfacing layers. The surface of the deposited layer of copper can be provided with a special enhanced interface layer by using a method provided by the invention. That is pre-heat of the copper layer followed by a pre-cleaning treatment with ammonia (NH) and N, followed by forming an adhesive enhanced layer over the copper layer by treatment with Nor Oor Nwith alkyl-silane or alkyl silane.

Thin interface layer to improve copper etch stop

A method of forming a copper/barrier layer interface comprising the following sequential steps. A structure having a lower copper layer formed thereover is provide. A patterned dielectric layer is formed over the lower copper layer. The patterned dielectric layer having an opening exposing a portion of the lower copper layer. The exposed portion of the lower copper layer is converted to a copper silicide portion. A barrier layer is formed upon the patterned dielectric layer and the copper silicide portion, lining the opening, whereby the lower copper layer/barrier layer interface is formed such that the barrier layer contacts the copper silicide portion to form an interface.

Via bottom copper/barrier interface improvement to resolve via electromigration and stress migration

In accordance with the objectives of the invention a new method is provided for improving adhesion strength that is deposited over the surface of a layer of copper. Conventional etch stop layers of for instance dichlorosilane (SiCl H ) or SiOC have poor adhesion with an underlying layer of copper due to poor molecular binding between the interfacing layers. The surface of the deposited layer of copper can be provided with a special enhanced interface layer by using a method provided by the invention. That is pre-heat of the copper layer followed by a pre-cleaning treatment with ammonia (NH ) and N , followed by forming an adhesive enhanced layer over the copper layer by treatment with N or O or N with alkyl-silane or alkyl silane.

An improved and new process for fabricating a planarized structure of copper or other conductive material embedded in low dielectric constant HSQ insulator has been developed. The planarizing method comprises the key step of forming a protective layer on the surface of a cured HSQ layer by treatment of the cured HSQ layer in either an NH plasma or a N plasma. The NH plasma or a N plasma treatment may be applied to the cured HSQ prior to or subsequent to etching holes in the cured HSQ. Following deposition of copper or other conductive material into holes etched in the HSQ layer, CMP is used to remove the copper or other conductive material from the surface of the cured and treated HSQ. The NH plasma or a N plasma treatment reduces the CMP removal rate of HSQ by a factor of 3 when using a CMP slurry designed to polish copper.

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Hsin-Chu, Taiwan

Tien I Bao