International Business Machines Corporation

Other

Globalfoundries Inc.

International Business Corporation

Gt Beverages, LLC

Thomas Weiss

David Clifford Long

Charles Leon Arvin

Michael J Fisher

Mark J LaPlante

William Santiago-Fernandez

James A Busby

Michael T Peets

William Louis Brodsky

Brian W Quinlan

Mark William Kapfhammer

Hilton T Toy

Shidong Li

Krishna R Tunga

Thomas Edward Lombardi

Benjamin V Fasano

Donald Merte

Silvio Dragone

Zachary Thomas Dreiss

Kamal Kumar Sikka

Steven Paul Ostrander

Brian Michael Erwin

Edmund D Blackshear

Charles L Reynolds

John Ulrich Knickerbocker

James N Humenik

James G Balz

Christopher Lee Tessler

Stephen Brian Gates

John Joseph Garant

Glen Nelson Biggs

Edward N Cohen

Robert L Weiss

Steve Ostrander

Bhupender Singh

Michael A Gaynes

John Peter Karidis

Russell Alan Budd

Robert P Westerfield, Jr

Jiantao Zheng

Marcus E Interrante

Christopher David Muzzy

Kenneth Parker Rodbell

Peter Alfred Gruber

John Richard Dangler

Govindarajan Natarajan

Raschid Jose Bezama

Sushumna Iruvanti

Thomas Anthony Wassick

Paul Francis Fortier

Richard Francis Indyk

Glenn A Pomerantz

Keith C O'Neil

Gregg B Monjeau

James Edward Tersigni

Elaine Cyr

Bouwe W Leenstra

Chris Muzzy

Clement J Fortin

Roger Lam

Inguald Alain Smith-Kielland

Thomas J Brunschwiler

Mark Kenneth Hoffmeyer

Katsuyuki Sakuma

Charles Hampton Perry

Mario John Interrante

Kevin M Prettyman

Luc Gilbert Guerin

Daniel George Berger

Tuhin Sinha

Yuet-Ying Yu

James P Sullivan

Phillip W Palmatier

Scott Ira Langenthal

Robert S Davis

Gregory Blair Martin

Karen P McLaughlin

David J Lewison

Timothy Andrew Birkmann

Franklin M Baez

Thomas P Moyer

Terence W Spoor

G Gerard Gormley

Ferdinand D DiMaria

Luca Del Carro

Camille Proietti Bowne

Rachel E Olson

Joseph Francis Conte

Vicky Jo Birkmann

Ingvald Alain Smith-Kielland

Brian Mark Reeves

Henry C Lisenbee

JoDee Jensen Smith

A multi-die integrated circuit device and a method of fabricating the multi-die integrated circuit device involve a substrate. Two or more dice include components that implement functionality of the multi-die integrated circuit. The components include logic gates. The multi-die integrated circuit device also includes a spacer disposed between the substrate and each of the two or more dice. Each of the two or more dice makes direct electrical contact with the substrate without making direct electrical contact with the spacer through holes in the spacer.

Spacer for die-to-die communication in an integrated circuit and method for fabricating the same

An alignment carrier, assembly and methods that enable the precise alignment and assembly of two or more semiconductor die using an interconnect bridge. The alignment carrier includes a substrate composed of a material that has a coefficient of thermal expansion that substantially matches that of an interconnect bridge. The alignment carrier further includes a plurality of solder balls located on the substrate and configured for alignment of two or more semiconductor die.

Alignment carrier for interconnect bridge assembly

A technique relates to an electronic package. A substrate is configured to receive a chip. A stiffener is attached to the substrate. The stiffener includes a core material with a first material formed on opposing sides of the core material.

Laminated stiffener to control the warpage of electronic chip carriers

An electrical device includes an electrically insulating body having an insulating body surface and a conductive pad array, a small conductive pad arranged on the insulating body surface and within the conductive pad array, and an enlarged conductive pad. The enlarged conductive pad is arranged on the insulating body and within the conductive pad array, wherein the enlarged conductive pad is spaced apart from the small conductive pad and is larger than the small conductive pad. C4 assemblies and methods of making C4 assemblies including the electrical device are also described.

Enlarged conductive pad structures for enhanced chip bond assembly yield

A multi-chip module (MCM) package includes an organic laminate substrate; first and second semiconductor device chips that are mounted to a top side of the substrate and that define a chip gap region between opposing edges of the chips; and a stiffener that is embedded in the bottom side of the substrate. The stiffener extends across a stiffening region, which underlies the chip gap region, and does not protrude beyond a bottom side metallization of the substrate.

Mitigating thermal-mechanical strain and warpage of an organic laminate substrate

Disclosed are embodiments of forming porous copper on the end of a copper pillar. The embodiments may be used to remove solder from selected locations on a chip or laminate substrate.

Personalized copper block for selective solder removal

In some embodiments, connecting a component to a substrate by adhesion to an oxidized solder surface includes: forming one or more conductive solder connections between the component and one or more conductive portions of the substrate; adhering the component to an oxidized surface of a solder portion applied to the substrate.

Connecting a component to a substrate by adhesion to an oxidized solder surface

At least one plating pen is brought into aligned relationship with at least one hole defined in a board. The pen includes a central retractable protrusion, a first shell surrounding the protrusion and defining a first annular channel therewith, and a second shell surrounding the first shell and defining a second annular channel therewith. The protrusion is lowered to block the hole and plating material is flowed down the first channel to a surface of the board and up into the second channel, to form an initial deposit on the board surface. The protrusion is raised to unblock the hole, and plating material is flowed down the first annular channel to side walls of the hole and up into the second annular channel, to deposit the material on the side walls of the hole.

Formation of terminal metallurgy on laminates and boards

Spacer for die-to-die communication in an integrated circuit

A module including a first semiconductor device, a second semiconductor device, a bridge support structure and a base substrate. The semiconductor devices each having first bonding pads having a first solder joined with the base substrate and the semiconductor devices each having second and third bonding pads joined to second and third bonding pads on the bridge support structure by a second solder and a third solder, respectively, on the second and third bonding pads; the semiconductor devices positioned adjacent to each other such that the bridge support structure joins to both of the semiconductor devices by the second and third solders wherein the third bonding pads are larger than the second bonding pads and the third bonding pads are at a larger pitch than the second bonding pads.

Bridge support structure

Disclosed are interconnects in which one substrate having a high melting temperature, lead-free solder column is joined to a second substrate having openings filled with a low melting temperature, lead-free solder such that the high melting temperature, lead-free solder column penetrates into the low melting temperature, lead-free solder so as to obtain a short moment arm of solder.

Lead-free column interconnect

A multiple chip carrier assembly including a carrier having a first surface and a second surface is attached to a plurality of chips is described. The plurality of chips include a first chip and a second chip. Each of the chips has first surface with a first set of solder balls for connecting to a package and a second set of solder balls for connecting to a high signal density bridge element. A second surface of each chip is bonded to the first surface of the carrier. A package has a first surface which is connected to the first sets of solder balls of the first and second chips. A high signal density bridge element having high signal density wiring on one or more layers is connected to the second sets of solder balls of the first and second chips. The bridge element is disposed between the first surface of the package and the first surfaces of the first and second chips.

Multiple chip carrier for bridge assembly

An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. Because the memory is integrated into the IC chip carrier, prior to the IC chip being attached thereto, reliability concerns that result from attaching the memory to the IC chip carrier affect the IC chip carrier and do not affect the yield of the relatively more expensive IC chip.

Carrier and integrated memory

An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. An access instruction may be sent from the IC chip to the memory through a wiring line of the IC chip carrier. Power potential may be sent from a system board to the memory through a vertical interconnect access (VIA). Alternatively, an access instruction may be sent from a first IC chip to the memory and power potential may be sent from a second IC chip to the memory.

A method of managing thermal warpage of a laminate which includes: assembling a stiffener and an adhesive on the laminate, the stiffener being a material that has a higher modulus of elasticity than the laminate; applying a force to deform the laminate a predetermined amount; heating the laminate, stiffener and adhesive to a predetermined temperature at which the adhesive cures to bond the stiffener to the laminate; cooling the laminate, stiffener and adhesive to a temperature below the predetermined temperature, the laminate maintaining its deformed shape.

Managing thermal warpage of a laminate

Growing community of inventors

Poughkeepsie, NY, United States of America

Thomas Weiss