Power-One Limited

Thomas Henry Templeton, Jr

Mysore Purushotham Divakar

John Alan Maxwell

A mounting structure for a semiconductor die that reduces die attach strain within the die attach material without sacrificing the electrical and thermal characteristics of the package. In one embodiment, the mounting structure comprises a die attach metallization layer, a solder mask, and a layer of die attach material. The solder mask forms a solder pattern over the top surface of the die attach metallization layer. The solder pattern covers a portion of the die attach metallization layer to create multiple exposed areas of the die attach metallization layer. Each exposed area is separated by the solder mask and is located under the semiconductor die when the semiconductor die is secured to the mounting structure. A layer of die attach material covers the solder pattern and fills in each one of the exposed areas to form a semiconductor die mounting surface. In another embodiment, the die attach metallization layer is divided into multiple, spaced-apart die attach pads that are electrically coupled together. A layer of die attach material covers a portion of each die attach pad and fills in the space between each die attach pad to form a semiconductor die mounting surface. A method of manufacturing the mounting structure is also disclosed.

Growing community of inventors

Fremont, CA, United States of America

Thomas Henry Templeton, Jr