Diodes Inc.

Other

Tao Long

Pin-Hao Huang

Ze Rui Chen

Bau-Shun Huang

Yiming Wang

Lee Spencer Riley

Chih-Hsiang Hsu

Zhongyuan Jin

Li-Hsien Chou

Paul Keith Gurry

Peng Chun Chen

A method of manufacturing a semiconductor structure forming a first diffusion layer on a first electrode layer and forming a core layer over the first diffusion layer. A second diffusion layer is formed over the core layer. A plurality of diffusion regions are formed in the second diffusion layer. A second electrode layer is formed over the second diffusion layer and in contact with the plurality of diffusion regions. The second diffusion layer is coupled to the plurality of diffusion regions through the second electrode layer. The substrate is sandwiched between the first electrode layer and the second electrode layer.

Method of fabricating a semiconductor structure

A method includes providing a substrate having a first conductivity type, and having a first surface and a second surface opposite to the first surface, diffusing impurities into the substrate to form a first diffusion layer having the first conductivity type and a second diffusion layer having a second conductivity type, forming a plurality of diffusion regions having the first conductivity in the second diffusion layer having the second conductivity type, forming a square groove ring in the substrate, forming a glass layer over the square groove ring, forming a first electrode layer on the first diffusion layer, and forming a second electrode layer on the second diffusion layer, wherein the second electrode layer is in contact with the plurality of diffusion regions.

Semiconductor structure and method of fabricating the same

A semiconductor structure includes: a substrate, having a cell region and a terminal region, and having a first surface, a second located in the terminal region, and a third surface located in the cell region, the second surface and the third surface being located at different levels; a first trench structure, located in the cell region, traversing the third surface to extend towards the first surface, including a first semiconductor material layer and a first oxide layer partially protruding from the third surface, and extending in a first direction parallel to the third surface; and a second trench structure, located in the cell region, including a second semiconductor material layer and a second oxide layer partially protruding from the third surface, and extending parallel to the first direction, wherein the third surface is provided with a doped region between the first trench structure and the second trench structure.

Trench MOS rectifier with termination structure

A semiconductor rectifier device includes: an epitaxial layer, having a top surface and a bottom surface; a first doped region having a first conductivity type, located in the epitaxial layer; a first trench structure, located in the first doped region; a second trench structure adjacent to the first trench structure, located in the first doped region; a second doped region having a second conductivity type, located in the epitaxial layer between the first trench structure and the second trench structure, wherein a depth of the second doped region is less than a depth of the first trench structure; and a metal layer, located on the top surface of the epitaxial layer, covering the first trench structure, the second trench structure, and the second doped region, wherein the metal layer is in contact with the top surface, forming a Schottky interface.

Trench Schottky barrier rectifier and method for fabricating same

The power semiconductor device comprises a base that includes a substrate and an epitaxial layer located above the substrate, with the base comprising a unit area and a peripheral area surrounding the unit area. A junction layer is located within the peripheral area and above the epitaxial layer. A barrier layer is located within the unit area and above the epitaxial layer. A first electrode is located on the junction layer and a second electrode is located on the barrier layer. The epitaxial layer includes a doped channel located within the peripheral area, extending between the junction layer and the base substrate. Current flows from the substrate through the doped channel and the junction layer to the first electrode.

Power semiconductor packaging and manufacturing method thereof

A semiconductor rectifier device comprises: an epitaxial layer having a top surface and a bottom surface; a first trench comprising a first side wall, a second side wall, and a first bottom surface; a second trench adjacent to the first trench, the second trench comprising a third side wall, a fourth side wall, and a second bottom surface; a first doped region abutting against the first side wall and at least a part of the first bottom surface of the first trench; a second doped region adjacent to and separated from the first doped region, wherein the second doped region abuts against the third side wall, the fourth side wall and the second bottom surface of the second trench; a gate structure disposed on the top surface between the first trench and the second trench; and a contact metal layer disposed on the top surface of the epitaxial layer.

Semiconductor rectifier and manufacturing method of the same

A semiconductor structure includes a substrate having a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first diffusion layer disposed in the substrate and adjacent to the first surface, and a first electrode layer disposed on the first diffusion layer. The semiconductor structure further includes a second diffusion layer disposed in the substrate and adjacent to the second surface, and a plurality of diffusion regions disposed in the second diffusion layer. The semiconductor structure further includes a second electrode layer disposed on the second diffusion layer and in contact with the plurality of diffusion regions. The second diffusion layer is coupled to the plurality of diffusion regions through the second electrode layer. The substrate is sandwiched between the first electrode layer and the second electrode layer.

A trench MOSFET rectifier includes oxide layers having different thicknesses formed in different regions of the devices. The rectifying device also includes a source region of first conductivity type at a surface of each mesa region and a body region of a second conductivity type beneath each source region. The rectifying device also includes a dielectric layer lining the bottom and sidewall surfaces of the trenches, the portion of the dielectric layer on the bottom surface being thicker than the portion on the sidewall surface. A doped region underlies each of the first plurality of trenches. A polycrystalline silicon region filling each of the first plurality of trenches to form a gate region in each trench. A conductive material fills a plurality of contact trenches and forms ohmic contacts with the source region, body region, and gate region.

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Shanghai, China

Tao Long