Advanpack Solutions Pte Ltd.

Tan Kim Hwee

Roman Perez

Kee Kwang Lau

Alex Chew

Antonio Dimaano

John Briar

Romeo Emmanuel P Alvarez

A chip level package utilizing a CGA is described. A semiconductor chip with pillars is molded in an encapsulant. Solder balls are added and connected to the chip pillars. The final package does not require a first level substrate or interposer and is able to be assembled to the next level as is. An additional embodiment describes the addition of a thermal heat sink to the packaged chip.

Package design and method of manufacture for chip grid array

A method of assembling a package having an exposed die comprising the following steps. A die attached to a substrate by connectors is provided. The die having a backside. Encapsulate is formed around the die and over the backside of the die to form an encapsulated package. The encapsulate overlying the backside of the die and a portion of the backside of the die are removed using a backside exposure process to complete the assembled package having the die exposed.

Method of assembling a package with an exposed die backside with and without a heatsink for flip-chip

A chip level package utilizing a CGA is described. A semiconductor chip with pillars is molded in an encapsulant. Solder balls are added and connected to the chip pillars. The final package does not require a first level substrate or interposer and is able to be assembled to the next level as is.

Semiconductor chip grid array package design and method of manufacture

An oxidized ( ) copper leadframe and a semiconductor die with copper posts extending from die pads, and with solder balls coated ( ) with flux on the end of the copper posts, are provided. The semiconductor die is placed ( ) on the oxidized copper leadframe, with the solder balls abutting portions of the layer of oxide, above and aligned with, interconnect locations on the leadframe. When reflowed ( ), the flux on the abutting portions of the oxide layer selectively cleans these portions of the oxide layer, away from the interconnect locations. In addition, the solder balls change to molten state and adhere to the cleaned copper surfaces at the interconnect locations. Advantageously, the rest of the oxide layer that is not cleaned away provides a passivation layer that advantageously contains and prevents the molten solder from flowing away from the interconnect locations.

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Singapore, Singapore

Tan Kim Hwee