Kabushiki Kaisha Toshiba

Takeo Nakayama

Akira Hokazono

Hisato Oyamatsu

Takeo Maeda

Masahiro Inohara

Kunihiro Kasai

Masahiko Matsumoto

Hiroshi Gojohbori

Yasuhiro Fukaura

Semiconductor wafer, method of manufacturing the same and semiconductor device

A shallow impurity diffusion layer adjacent to a gate electrode is formed by forming a side-wall insulating film of the gate electrode twice, and a MOS transistor of the salicide type having improved short-channel effect is embodied. An impurity diffusion layer portion not adjacent to a gate electrode of a source/drain region is formed first by self-alignment with a first side-wall insulating film. After an impurity diffusion layer adjacent to the gate electrode is formed by self-alignment with the gate electrode, a second side-wall insulating film is formed. Silicide films are formed on the gate electrode and source/drain region by self-alignment with the second side-wall insulating film.

Process for fabricating a aligned LDD transistor

Dummy patterns are formed in signal patterns of a first metal layer, an insulating film covering such patterns is flattened by CMP, and only dummy patterns are selectively etched by anisotropic etching through holes opened at specific intervals. Then the opened holes are filled with an insulating film, and cavities are formed. In the upper part of the cavity, a signal line of the second metal layer is formed. As a result, a semiconductor device is provided by the CMP flattening technology without being accompanied by increase of parasitic capacity between signal lines by metal dummy patterns or shorting due to dust and the like.

Semiconductor device and its manufacturing method

In a semiconductor device, an emitter electrode has a polysilicon layer provided in a first contact hole and on a first insulating film. The polysilicon layer is in contact with an emitter region and is covered with a metal layer. A second contact hole is provided on a part of a second insulating film located on a substantially flat portion of the metal layer. A third contact hole is provided in those portions of the first insulating film and a second insulating layer which are located on a base region.

Bipolar transistor having an emitter electrode formed of polysilicon

A MOSFET constituting a flip-flop circuit and a MOSFET for control of reading and writing data out of and into a memory cell are formed on a semiconductor. The gate electrode of the first MOSFET and the gate electrode of the second MOSFET are formed by layers of different levels. The gate electrodes have an overlapped portion R. The first and second MOSFETs are arranged symmetrically with respect to a certain point P. By virtue of the above structure, the degree of integration of a static RAM is enhanced.

Semiconductor device

A semiconductor device comprises a semiconductor substrate having a diffused region and an element region, and the diffused region and the element region overlap at least partially. An insulating layer having a contact hole is provided at the surface of the substrate. A wiring layer crosses over the contact hole to form at least four crossing points with respect to the contact hole. The crossing points over the element region correspond to the overlap between the diffused region and the element region.

Growing community of inventors

Kanagawa-ken, Japan

Takeo Nakayama